Patents by Inventor Daniel J. Post

Daniel J. Post has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120236658
    Abstract: Systems and methods are disclosed for managing a non-volatile memory (“NVM”), such as a flash memory. To prevent data errors due to leakage effects, the NVM may be refreshed. For example, a reserved portion of the NVM may be selected, and a predetermined pattern can be stored into the reserved portion. The reserved portion can then be monitored for storage deterioration over time. After determining that storage deterioration of the reserved portion has occurred, the NVM can be refreshed. In some embodiments, a controller can attempt to distinguish data errors due to leakage effects from data errors due to disturb issues.
    Type: Application
    Filed: March 14, 2012
    Publication date: September 20, 2012
    Applicant: APPLE INC.
    Inventors: Matthew Byom, Daniel J. Post, Vadim Khmelnitsky
  • Publication number: 20120221767
    Abstract: Systems and methods are disclosed for efficient buffering for a system having non-volatile memory (“NVM”). In some embodiments, a control circuitry of a system can use heuristics to determine whether to perform buffering of one or more write commands received from a file system. In other embodiments, the control circuitry can minimize read energy and buffering overhead by efficiently re-ordering write commands in a queue along page-aligned boundaries of a buffer. In further embodiments, the control circuitry can optimally combine write commands from a buffer with write commands from a queue. After combining the commands, the control circuitry can dispatch the commands in a single transaction.
    Type: Application
    Filed: February 28, 2011
    Publication date: August 30, 2012
    Applicant: APPLE INC.
    Inventors: Daniel J. Post, Nir Wakrat
  • Publication number: 20120198125
    Abstract: Systems and methods are disclosed for increasing efficiency of read operations by selectively adding pages from a pagelist to a batch, such that when the batch is executed as a read operation, each page in the batch can be concurrently accessed. The pagelist can include all the pages associated a read command received, for example, from a file system. Although the pages associated with the read command may have an original read order sequence, embodiments according to this invention re-order this original read order sequence by selectively adding pages to a batch. A page is added to the batch if it does not collide with any other page already added to the batch. A page collides with another page if neither page can be accessed simultaneously. One or more batches can be constructed in this manner until the pagelist is empty.
    Type: Application
    Filed: January 28, 2011
    Publication date: August 2, 2012
    Applicant: Apple Inc.
    Inventors: Daniel J. Post, Matthew Byom
  • Publication number: 20120198124
    Abstract: Systems and methods are disclosed for increasing efficiency of read operations by selectively re-ordering a sequence in which logical block addresses (“LBAs”) are read out of multi-level cell (“MLC”) non-volatile memory. In one embodiment, the LBAs can correspond to upper and lower pages. Because data stored in lower pages can be retrieved from NVM faster than data stored in upper pages, embodiments disclosed herein can selectively re-order the LBAs such that the first LBA to be read corresponds to a lower page.
    Type: Application
    Filed: January 28, 2011
    Publication date: August 2, 2012
    Applicant: Apple Inc.
    Inventors: Daniel J. Post, Matthew Byom, Michael Williams
  • Publication number: 20120198126
    Abstract: Systems and methods are disclosed for increasing efficiency of read operations by minimizing the number of block switching events necessary to read each page associated with a read command. According to embodiments of this invention, for any given block containing one or more pages that need to be read for a read command, each of those one or more pages is read before switching to another block, thereby eliminating potential time penalties in switching between blocks. A block switching module according to embodiments of the invention instructs a NVM controller to read all relevant pages out of a given block even if an original read order sequence of the pages to be read would otherwise normally cause NVM controller to switch to another block.
    Type: Application
    Filed: January 28, 2011
    Publication date: August 2, 2012
    Applicant: Apple Inc.
    Inventors: Daniel J. Post, Matthew Byom
  • Publication number: 20120198123
    Abstract: Systems and methods are provided for storing data to or reading data from a non-volatile memory (“NVM”), such as flash memory, using a metadata redundancy scheme. In some embodiments, an electronic device, which includes an NVM, may also include a memory interface for controlling access to the NVM. The memory interface may receive requests to write user data to the NVM. The user data from each request may be associated with metadata, such as a logical address, a directional flag, or other data. In response to a write request, the NVM interface may store the user data and its associated metadata in a first memory location (e.g., page), and may store a redundant copy of the metadata in a second memory location. The directional flag indicates the geometric relationship between the first memory location and the second memory location. Thus, if the first memory location becomes inaccessible, the memory interface can still recover the metadata from the backup copy stored in the second memory location.
    Type: Application
    Filed: January 28, 2011
    Publication date: August 2, 2012
    Applicant: Apple Inc.
    Inventor: Daniel J. Post
  • Publication number: 20120191664
    Abstract: Systems and methods for coordinating sync points between a non-volatile memory (“NVM”) and a file system are provided. In some embodiments, a file system can issue one or more commands to control circuitry of a NVM, which can indicate whether a transaction is journaled or non-journaled. This way, the control circuitry can maintain a list of journaled transactions and corresponding LBA(s). By keeping track of journaled transactions, the control circuitry can ensure that sync points are not prematurely erased during a garbage collection process. In addition, upon detecting device failure events, the control circuitry can roll back to sync points corresponding to one or more journaled transactions.
    Type: Application
    Filed: January 24, 2011
    Publication date: July 26, 2012
    Applicant: Apple Inc.
    Inventors: Nir J. Wakrat, Daniel J. Post, Dominic Giampaolo
  • Publication number: 20120173832
    Abstract: Systems and methods are disclosed for handling dynamic and static data for a system having non-volatile memory (“NVM”). By determining whether data being written to the NVM is dynamic or not, a NVM interface of a system can determine where to initially place the data on the NVM (e.g., place the data on either a dynamic stream block or a static stream block). Moreover, this information can allow the NVM interface to improve the efficiencies of both garbage collection (“GC”) and wear leveling.
    Type: Application
    Filed: January 3, 2011
    Publication date: July 5, 2012
    Applicant: Apple Inc.
    Inventors: Daniel J. Post, Nir J. Wakrat
  • Publication number: 20120151120
    Abstract: This can relate to handling a non-volatile memory (“NVM”) operating at a substantially full memory. The non-volatile memory can report its physical capacity to an NVM driver. The NVM driver can scale-up the physical capacity a particular number of times to generate a “scaled physical capacity,” which is then reported to the file system. Because the scaled physical capacity is greater than the NVM's actual physical capacity, the file system allocates a logical space to the NVM that is substantially greater than the NVM's capacity. This can cause less crowding of the logical block addresses within the logical space, thus making it easier for the file system to operate and improving system performance. A commitment budget can also be reported to the file system that corresponds to the NVM's physical capacity, and which can define the amount of data the file system can commit for storage in the NVM.
    Type: Application
    Filed: December 9, 2010
    Publication date: June 14, 2012
    Applicant: Apple Inc.
    Inventors: Daniel J. Post, Nir J. Wakrat
  • Patent number: 8164967
    Abstract: Systems and methods are disclosed for managing a non-volatile memory (“NVM”), such as a flash memory. To prevent data errors due to leakage effects, the NVM may be refreshed. For example, a reserved portion of the NVM may be selected, and a predetermined pattern can be stored into the reserved portion. The reserved portion can then be monitored for storage deterioration over time. After determining that storage deterioration of the reserved portion has occurred, the NVM can be refreshed. In some embodiments, a controller can attempt to distinguish data errors due to leakage effects from data errors due to disturb issues.
    Type: Grant
    Filed: March 24, 2010
    Date of Patent: April 24, 2012
    Assignee: Apple Inc.
    Inventors: Matthew Byom, Daniel J. Post, Vadim Khmelnitsky
  • Publication number: 20120084484
    Abstract: Systems and methods are disclosed for selectively combining commands for a system having non-volatile memory (“NVM”). In some embodiments, a command dispatcher of a system can receive multiple commands to access a NVM for a period of time. After receiving the multiple commands, the command dispatcher can determine a set of commands that are naturally combinable. In some embodiments, the command dispatcher can select commands that are fairly distributed across different chip enables (“CEs”) and/or buses. After selecting the set of commands, the command dispatcher can combine the set of commands into a multi-access command. Finally, the command dispatcher can dispatch the multi-access command to the NVM.
    Type: Application
    Filed: September 30, 2010
    Publication date: April 5, 2012
    Applicant: Apple Inc.
    Inventors: Daniel J. Post, Nir J. Wakrat, Vadim Khmelnitsky
  • Publication number: 20120084627
    Abstract: Systems and methods are disclosed for data recovery using outer codewords stored in volatile memory. Outer codewords can be associated with one or more horizontal portions or vertical portions of a non-volatile memory (“NVM”). In some embodiments, an NVM interface of an electronic device can program user data to a super block of the NVM. The NVM interface can then determine if a program disturb has occurred in the super block. In response to detecting that a program disturb has occurred in the super block, the NVM interface can perform garbage collection on the super block. The NVM interface can then use outer codewords associated with the super block to recover from any uncorrectable error correction code errors detected in the super block.
    Type: Application
    Filed: September 30, 2010
    Publication date: April 5, 2012
    Applicant: Apple Inc.
    Inventors: Daniel J. Post, Kenneth Herman
  • Publication number: 20120054465
    Abstract: Systems and methods for trimming LBAs are provided. The LBAs can be trimmed from a file and from an NVM interface that maintains a logical-to-physical translation of the file's LBAs and controls management of the file's contents stored on non-volatile memory (“NVM”). The file can be any suitable file that has any number of associated LBAs. In addition, the file can be linked to one or more data chunks stored in the NVM, each data chunk associated with LBAs in the file. When a data chunk is retrieved or read from the NVM, that chunk no longer needs to be maintained in the NVM. Accordingly, after the data chunk is retrieved from the NVM and provided to an appropriate destination, the LBAs associated with the retrieved data chunk can be trimmed.
    Type: Application
    Filed: August 31, 2010
    Publication date: March 1, 2012
    Applicant: Apple Inc.
    Inventors: Daniel J. Post, Eric Tamura, Matthew Byom, Neil Crane, Kenneth Herman, Francois Barbou-des-Place
  • Publication number: 20120054582
    Abstract: Systems, apparatuses, and methods are provided for detecting corrupted data for a system having non-volatile memory, such as NAND Flash memory. In some embodiments, a non-volatile memory (“NVM”) package is provided, which can include a NVM controller and one or more NVM dies. Each NVM die can include one or more blocks, where each block can further include an array of memory cells. One or more of these memory cells can be configured as “multi-level cells” (“MLCs”). In some embodiments, in order to avoid transmitting data obtained from an improperly programmed page of a MLC, a NVM controller can be configured to detect if data obtained from the page is in fact data stored in a different page.
    Type: Application
    Filed: August 31, 2010
    Publication date: March 1, 2012
    Applicant: Apple Inc.
    Inventors: Matthew Byom, Daniel J. Post, Vadim Khmelnitsky, Nir J. Wakrat
  • Publication number: 20120054541
    Abstract: Systems and methods are provided for handling errors during device bootup from a non-volatile memory (“NVM”). A NVM interface of an electronic device can be configured to detect errors and maintain an error log in volatile memory while the device is being booted up. Once device bootup has completed, a NVM driver of the electronic device can be configured to correct the detected errors using the error log. For example, the electronic device can move data to more reliable blocks and/or retire blocks that are close to failure, thereby improving overall device reliability.
    Type: Application
    Filed: August 31, 2010
    Publication date: March 1, 2012
    Applicant: Apple Inc.
    Inventors: Matthew Byom, Kenneth Herman, Nir J. Wakrat, Daniel J. Post
  • Publication number: 20120047409
    Abstract: Systems and methods are disclosed for generating dynamic super blocks from one or more grown bad blocks of a non-volatile memory (“NVM”). In some embodiments, a dynamic super block can be formed by striping together a subset of memory locations of grown bad blocks from one or more dies of a NVM. The subset of memory locations may be selected based on at least one reliability measurement of the subset of memory locations. In some embodiments, in response to detecting one or more access failures in a portion of the dynamic super block, the NVM interface can retire at least a portion of the dynamic super block. In some embodiments, the NVM interface can reconstruct a new dynamic super block from the dynamic super block by progressively increasing the size of the new dynamic super block.
    Type: Application
    Filed: August 23, 2010
    Publication date: February 23, 2012
    Applicant: APPLE INC.
    Inventors: Daniel J. Post, Hsiao Thio
  • Publication number: 20120047315
    Abstract: Systems and methods are disclosed for adaptive writing behavior for a system having non-volatile memory (“NVM”). A memory interface of a system can be configured to determine whether a write preference of the system is skip-sequential. In response to determining that the write preference is skip-sequential, the memory interface can sequentially program data to a first set of pages of a block of the NVM. In addition, the memory interface can sequentially pre-merge gaps between the first set of pages with one or more pages of a data block. Moreover, the memory interface can be configured to switch to an alternative programming state in response to determining that at least one condition has been satisfied. For example, the memory interface can stop programming data sequentially, and instead program data in the order that the data is received from a file system.
    Type: Application
    Filed: August 23, 2010
    Publication date: February 23, 2012
    Applicant: APPLE INC.
    Inventors: Daniel J. Post, Brian Sutton
  • Publication number: 20120047316
    Abstract: Systems and methods are disclosed for efficient allocation policies for a system having non-volatile memory. A file system allocator of the system can be configured to allocate memory regions that are aligned with one or more logical blocks of a logical space (e.g., one or more super block-aligned regions). In some embodiments, the file system allocator can monitor the number of free sectors corresponding to each logical block. In other embodiments, the file system allocator can monitor a ratio of free space to total space corresponding to each logical block. The file system allocator can select a logical block based at least in part on the number of free sectors of the logical block. In some cases, the file system allocator can allocate the free sectors of the logical block in a sequential order.
    Type: Application
    Filed: August 23, 2010
    Publication date: February 23, 2012
    Applicant: APPLE INC.
    Inventors: Daniel J. Post, Brian Sutton
  • Publication number: 20120030409
    Abstract: Systems and methods are provided for initiating wear leveling on block-aligned boundaries for non-volatile memories (“NVMs”), such as flash memory. In some embodiments, an electronic device including the NVM may suspend the programming of data upon reaching the end of a dynamic block. The electronic device may then perform wear leveling on a low-cycled block of the NVM. The electronic device may thus be configured to copy static data from the low-cycled block to another block of the NVM. After wear leveling has completed, the memory interface can program a second portion of the data to a new dynamic block of the NVM. This way, the electronic device can improve the efficiency of garbage collection. In addition, the electronic device can decrease the programming time for user generated writes, the wearing of the NVM, and overall power consumption.
    Type: Application
    Filed: July 30, 2010
    Publication date: February 2, 2012
    Applicant: Apple Inc.
    Inventors: Daniel J. Post, Vadim Khmelnitsky
  • Publication number: 20120030506
    Abstract: Systems and methods are disclosed for handling read disturbs based on one or more characteristics of read operations performed on a non-volatile memory (“NVM”). In some embodiments, a control circuitry of a system can generate a variable damage value determined based on one or more characteristics of a read operation. Using the damage value, the control circuitry can update a score associated with the block. If the control circuitry determines that the score exceeds a pre-determined threshold, at least a portion of the block can be relocated to a different memory location in the NVM. In some embodiments, portions of the block may be relocated over a period of time.
    Type: Application
    Filed: July 30, 2010
    Publication date: February 2, 2012
    Applicant: Apple Inc.
    Inventors: Daniel J. Post, Hsiao Thio