Patents by Inventor Daniel J. Rodrigues

Daniel J. Rodrigues has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240120873
    Abstract: A roof integrated solar power system includes a plurality of solar modules. Each solar module carries a photovoltaic or solar panel with solar cells. Edge regions of the solar module are disposed to the sides of the solar panel and are devoid of solar cells. An electrical component such as a junction box or micro-inverter, or DC optimizer is mounted on top of the solar module within at least one of the edge regions. Cabling for interconnecting the electrical component to electrical components of others of the plurality of solar modules also is located within the side regions. In one embodiment, the electrical component and cabling is disposed within a recess within a side region and covered by a flat access panel. In another embodiment, the electrical component and cabling is located atop the side region and is covered by an access panel in the form of a protective cover strip.
    Type: Application
    Filed: October 20, 2023
    Publication date: April 11, 2024
    Inventors: Tommy F. Rodrigues, Sudhir Railkar, Daniel E. Boss, David J. Gennrich, Cory Boudreau, Daniel Roger Nett, Kent J. Kallsen
  • Patent number: 10943032
    Abstract: Techniques for processing I/O operations may include performing DMA (direct memory access) operations between a data storage system, one or more physical storage devices, and a hardware component that communicate over at least one bus using a DMA-based protocol, such as NVMe (Non-Volatile Memory Express). The hardware device may perform encryption and decryption processing of data that is, respectively, stored to, and read from, physical non-volatile storage. The hardware device may optionally perform other processing for other data-related operations such as any of data validation and integrity checking, data deduplication, data compression, and data decompression. When performing DMA transfers, multiple descriptors, such as SGLs (scatter gather lists) or PRPs (physical region pages), for multiple data portions having logically contiguous consecutive logical addresses may be combined into a single descriptor sent in a single DMA operation.
    Type: Grant
    Filed: July 31, 2018
    Date of Patent: March 9, 2021
    Assignee: EMC IP Holding Company LLC
    Inventors: Stephen Richard Ives, Ningdong Li, Seema G. Pai, Daniel J. Rodrigues, Scott Rowlands
  • Publication number: 20200042748
    Abstract: Techniques for processing I/O operations may include performing DMA (direct memory access) operations between a data storage system, one or more physical storage devices, and a hardware component that communicate over at least one bus using a DMA-based protocol, such as NVMe (Non-Volatile Memory Express). The hardware device may perform encryption and decryption processing of data that is, respectively, stored to, and read from, physical non-volatile storage. The hardware device may optionally perform other processing for other data-related operations such as any of data validation and integrity checking, data deduplication, data compression, and data decompression. When performing DMA transfers, multiple descriptors, such as SGLs (scatter gather lists) or PRPs (physical region pages), for multiple data portions having logically contiguous consecutive logical addresses may be combined into a single descriptor sent in a single DMA operation.
    Type: Application
    Filed: July 31, 2018
    Publication date: February 6, 2020
    Applicant: EMC IP Holding Company LLC
    Inventors: Stephen Richard Ives, Ningdong Li, Seema G. Pai, Daniel J. Rodrigues, Scott Rowlands
  • Patent number: 7953109
    Abstract: An input/output section for producing a disable signal at a data transmitter enable/disable terminal of a transceiver in response to the transmit disable enable at the disable signal port of a processor independent of the transmit control signal at the transmit signal port of source of data to be transmitted by the transceiver.
    Type: Grant
    Filed: December 24, 2008
    Date of Patent: May 31, 2011
    Assignee: EMC Corporation
    Inventors: Thomas J DePari, Daniel J. Rodrigues
  • Publication number: 20100192292
    Abstract: A urinal cleaning unit for cleaning a urinal having periodic water flow therethrough comprises: (a) a mounting device for attaching the urinal clean unit to a urinal; (b) a disposable unit adapted for releasably attaching to the mounting device; and (c) a chamber in the disposable unit for containing a cleaning agent adapted to intercept a portion of the water flow. A method of cleaning a urinal having periodic water flow therethrough comprises: (a) mounting a disposable unit to a urinal; (b) enabling a portion of the water flow to flow through the disposable unit; and (c) mixing the portion of the water flow with a cleaning agent in the disposable unit to form a mixture of water and cleaning agent; and (d) releasing the mixture of water and cleaning agent to the urinal.
    Type: Application
    Filed: January 29, 2010
    Publication date: August 5, 2010
    Applicant: F-MATIC, INC.
    Inventors: Haruyoshi Miyagi, Daniel J. Rodrigue, Christian Weaver
  • Publication number: 20090260658
    Abstract: A toilet bowl cleaning unit disposed to intercept an intermittent flow of water from each flush of the water from a water line to a toilet bowl comprising a mounting device for installation in the flow of water, and a water-soluble compound positioned on the mounting device to intercept a substantial portion of the water as it is flushed from the water line to the toilet bowl, said water-soluble compound thereby being released into the toiled bowl with the water from each flush to inhibit formation of mineral deposits on the surfaces of the toilet bowl and/or drainage pipes.
    Type: Application
    Filed: February 23, 2009
    Publication date: October 22, 2009
    Inventors: Haruo Miyagi, Yoshi Miyagi, Haruyoshi Miyagi, Daniel J. Rodrigue, Mark E. Schulte
  • Patent number: 4796025
    Abstract: A monitor/control communication net with intelligent peripherals, that is, peripherals which are capable of monitoring and/or controlling various devices in accordance with messages received from a central panel cpu and which are also capable of reporting to the central panel the status of one or more devices monitored by the peripheral. Each peripheral is assigned a unique address by which it is polled by the central panel. All communication messages between the central panel and peripherals include a format code which indicates the nature of the message and the length of any data field in the message. Communication time is minimized by permitting the data field to vary in length from one peripheral to another, depending on the number and type of devices being monitored and/or controlled by the peripherals.
    Type: Grant
    Filed: June 4, 1985
    Date of Patent: January 3, 1989
    Assignee: Simplex Time Recorder Co.
    Inventors: Robert W. Farley, Lawrence Kaplan, Daniel J. Rodrigues, Bruce A. Wahler, Charles J. Motyka