Abstract: Systems/techniques that facilitate zero-noise extrapolation of quantum circuit switch statements are provided. In various embodiments, a system can comprise a modification component that can insert quantum gates or pulses in delays of the concurrent switch instructions to cause the delays to satisfy assumptions of zero-noise extrapolation, an execution component that can execute the quantum circuit a plurality of times, wherein a different stretch factor is used to stretch delays of the switch instructions for a subset of executions, and an analysis component that can extrapolate one or more measured observables from the plurality of executions to a zero-delay limit. Furthermore, the analysis component can measure noise within the switch instructions that can violate assumptions of zero-noise extrapolation, and therefore determine a dynamical decoupling sequence to employ based on the measured noise.

Abstract: A method, system, and computer program product for implementing a quantum fan-out operation. A fan-out gate is constructed using ladders of CNOT gates in a constant depth using a dynamic quantum circuit. Constant depth refers to the depth or number of time steps being independent of the number of qubits. A dynamic quantum circuit is a quantum circuit with mid-circuit measurements and feed-forward classical operations which allows such circuits to be adaptive on-the-fly. The quantum fan-out operation is implemented by the fan-out gate using ancilla qubits and feed-forward operations. In this manner, the quantum fan-out operation can be implemented on superconducting devices at a reduced depth (constant depth) with fewer CNOT gates as well as using fewer ancilla qubits.

Abstract: Embodiments are provided for error mitigation in quantum programs. In some embodiments, a system can include a processor that executes computer-executable components stored in memory. The computer-executable components can include a noise assessment component that identifies a noise condition of a qubit device based on a noise property of quantum hardware configured to operate on the qubit device. The qubit device is represented in a quantum program executable on the noisy quantum hardware. The computer-executable components also can include a compilation component that modifies the quantum program by inserting a defined sequence of error-mitigating operations into the quantum program based on the noise condition.

Abstract: A system can comprise a memory that can store computer-executable components and a processor that can execute the computer-executable components stored in the memory, wherein the computer-executable components can comprise a circuit transpiler unit that can identify respective placement of one or more mid-circuit measurements and one or more classically controlled feed-forward operations on a quantum circuit. The computer-executable components can further comprise a circuit transpiler unit that can identify respective placement of one or more mid-circuit measurements and one or more classically controlled feed-forward operations on a quantum circuit. The computer-executable components can further comprise a circuit twirling unit that can create twirled layers of circuit instructions by twirling respective classical bits controlling the one or more classically controlled feed-forward operations.

Abstract: A method, system and computer program product for generating optimal samples in quantum optimization algorithms. A quantum error mitigation technique is used to generate samples of a resulting probability distribution from random quantum circuits. Examples of such quantum error mitigation techniques include probabilistic error cancellation (PEC) and zero noise extrapolation (ZNE). An objective (ƒ(x)) for every generated sample (|x) is then computed. A conditional value at risk (CVaR) at a particular level of the computed objective functions corresponding to an optimal sample in a quantum optimization algorithm, such as a variational quantum optimization algorithm, is then computed. In this manner, optimal samples in quantum optimization algorithms are generated using quantum error mitigation techniques, such as probabilistic error cancellation and zero noise extrapolation.

Abstract: A quantum noise mitigation system can comprise a memory that stores, and a processor that executes, computer executable components comprising a pulse calibration component that, for controlling execution of a quantum gate of a quantum circuit, calibrates an echo extender tone parameter for a set of echo extender tones of an echo pulse sequence, wherein the pulse calibration component inserts the set of echo extender tones into the echo pulse sequence of an initial pulse sequence resulting in generation of a modified pulse sequence for use in controlling the execution of the quantum gate, and a parameterizing component that parameterizes the set of echo extender tones using a scalable stretch factor for stretching respective durations of the set of echo extender tones.

Abstract: A method, computer system, and a computer program product for a resource-efficient pulse-based variational quantum circuit running on a selected quantum hardware to solve a given predefined problem. The present invention may include controlling an execution of a plurality of different quant controlling an execution of a plurality of different quantum circuits using the selected quantum hardware for the given predefined problem to be solved, evaluating a performance of each of the plurality of different quantum circuits, selecting a best performing one of the plurality of quantum circuits, generating a pulse sequence having a pulse schedule tailored to the selected quantum hardware and the given problem for the best performing one of the plurality of the different quantum circuits, and determining a simplified pulse schedule of the pulse sequence, thereby producing an efficient pulse-based schedule that acts as a pulse-based variational form for the best performing quantum circuit.

Abstract: The present disclosure relates to a quantum system of dimension M comprising a transmon device. The transmon device is in an initial state ?ini which is restricted to a state ?S of a N-dimensional quantum system embedded in the quantum system, where N<M. The transmon device is configured to receive a sequence of pulses for transforming the initial state ?ini to a state ?ext of the quantum system. The transmon device is connected to a readout that is configured to perform a projection-valued measure (PVM) of the transmon device in its state ?ext.

Abstract: Techniques regarding quantum computer error mitigation are provided. For example, one or more embodiments described herein can comprise a system, which can comprise a memory that can store computer executable components. The system can also comprise a processor, operably coupled to the memory, and that can execute the computer executable components stored in the memory. The computer executable components can comprise an error mitigation component that interpolates a gate parameter associated with a target stretch factor from a reference model that includes reference gate parameters for a quantum gate calibrated at a plurality of reference stretch factors.

Abstract: Techniques regarding quantum error mitigation are provided. For example, one or more embodiments described herein can comprise a system, which can comprise a memory that can store computer executable components. The system can also comprise a processor, operably coupled to the memory, and that can execute the computer executable components stored in the memory. The computer executable components can comprise an error mitigation component that can add a set of scaled quantum gates to a quantum circuit for error mitigation. The set of scaled quantum gates can comprise a quantum gate and an inverse of the quantum gate. Also, the set of scaled quantum gates can have a rotation angle based on a pulse schedule to achieve a target stretch factor.

Abstract: Systems and methods that address an optimized method to handle portfolio constraints such as integer budget constraints and solve portfolio optimization problems that map both to mixed binary and quadratic binary optimization problems. A digital processor is used to create a hierarchical clustering; this clustering is leveraged to allocate capital to sub-clusters of the hierarchy. Once the sub-clusters are sufficiently small, a quantum processor is used to solve the portfolio optimization problem. Thus, the innovation employs clustering to reduce an optimization problem to sub-problems that are sufficiently small enough to be solved using a quantum computer given available qubits.

Abstract: Techniques regarding quantum error mitigation are provided. For example, one or more embodiments described herein can comprise a system, which can comprise a memory that can store computer executable components. The system can also comprise a processor, operably coupled to the memory, and that can execute the computer executable components stored in the memory. The computer executable components can comprise an error mitigation component that can add a set of scaled quantum gates to a quantum circuit for error mitigation. The set of scaled quantum gates can comprise a quantum gate and an inverse of the quantum gate. Also, the set of scaled quantum gates can have a rotation angle based on a pulse schedule to achieve a target stretch factor.

Abstract: Systems and methods that address an optimized method to improve systems and methods for handling inequality constraints in mixed binary optimization problems on quantum computers and to solve local optima which significantly improves system performance. Embodiments employ an improved methodology that can optimize parameters, determine an optimal slack variable and optimize variational parameters for fixed slack variables. This procedure allows to move out of local minima, solve an optimization and improve the system performance by providing optimal results. These embodiments also extend to variational hybrid quantum/classical algorithms for gate-based quantum computers.

Abstract: Systems and methods that address an optimized method to handle portfolio constraints such as integer budget constraints and solve portfolio optimization problems that map both to mixed binary and quadratic binary optimization problems. A digital processor is used to create a hierarchical clustering; this clustering is leveraged to allocate capital to sub-clusters of the hierarchy. Once the sub-clusters are sufficiently small, a quantum processor is used to solve the portfolio optimization problem. Thus, the innovation employs clustering to reduce an optimization problem to sub-problems that are sufficiently small enough to be solved using a quantum computer given available qubits.

Abstract: Techniques and a system to facilitate simulation-based optimization on a quantum computer are provided. In one example, a system includes a quantum processor. The quantum processor performs a quantum amplitude estimation process based on a probabilistic distribution associated with a decision-making problem. Furthermore, the quantum processor includes a simulator that simulates the decision-making problem based on the quantum amplitude estimation process.

Abstract: Embodiments are provided for error mitigation in quantum programs. In some embodiments, a system can include a processor that executes computer-executable components stored in memory. The computer-executable components can include a noise assessment component that identifies a noise condition of a qubit device based on a noise property of quantum hardware configured to operate on the qubit device. The qubit device is represented in a quantum program executable on the noisy quantum hardware. The computer-executable components also can include a compilation component that modifies the quantum program by inserting a defined sequence of error-mitigating operations into the quantum program based on the noise condition.

Abstract: Techniques regarding quantum computer error mitigation are provided. For example, one or more embodiments described herein can comprise a system, which can comprise a memory that can store computer executable components. The system can also comprise a processor, operably coupled to the memory, and that can execute the computer executable components stored in the memory. The computer executable components can comprise an error mitigation component that interpolates a gate parameter associated with a target stretch factor from a reference model that includes reference gate parameters for a quantum gate calibrated at a plurality of reference stretch factors.

Abstract: Techniques regarding quantum computer error mitigation are provided. For example, one or more embodiments described herein can comprise a system, which can comprise a memory that can store computer executable components. The system can also comprise a processor, operably coupled to the memory, and that can execute the computer executable components stored in the memory. The computer executable components can comprise an error mitigation component that interpolates a gate parameter associated with a target stretch factor from a reference model that includes reference gate parameters for a quantum gate calibrated at a plurality of reference stretch factors.

Abstract: Systems and methods that address an optimized method to improve system and method for handling inequality constraints in mixed binary optimization problems on quantum computers and to solve local optima which significantly improves system performance. Embodiments employ an improved methodology that can optimize parameters, determine an optimal slack variable and optimize variational parameters for fixed slack variables. This procedure allows to move out of local minima, solve an optimization and improve th system performance by providing optimal results. These embodiments also extend to variational hybrid quantum/classical algorithms for gate-based quantum computers.

Abstract: Systems and methods that address an optimized method to handle portfolio constraints such as integer budget constraints and solve portfolio optimization problems that map both to mixed binary and quadratic binary optimization problems. A digital processor is used to create a hierarchical clustering; this clustering is leveraged to allocate capital to sub-clusters of the hierarchy. Once the sub-clusters are sufficiently small, a quantum processor is used to solve the portfolio optimization problem. Thus, the innovation employs clustering to reduce an optimization problem to sub-problems that are sufficiently small enough to be solved using a quantum computer given available qubits.