Abstract: A method and system for a command processor for efficient processing of a program multi-processor core system with a CPU and GPU. The multi-core system includes a general purpose CPU executing commands in a CPU programming language and a graphic processing unit (GPU) executing commands in a GPU programming language. A command processor is coupled to the CPU and CPU. The command processor sequences jobs from a program for processing by the CPU or the GPU. The command processor creates commands from the jobs in a state free command format. The command processor generates a sequence of commands for execution by either the CPU or the GPU in the command format. A compiler running a meta language converts program data for the commands into a first format readable by the CPU programming language and a second format readable by the GPU programming language.

Abstract: A method and system for a command processor for efficient processing of a program multi-processor core system with a CPU and GPU. The multi-core system includes a general purpose CPU executing commands in a CPU programming language and a graphic processing unit (GPU) executing commands in a GPU programming language. A command processor is coupled to the CPU and CPU. The command processor sequences jobs from a program for processing by the CPU or the GPU. The command processor creates commands from the jobs in a state free command format. The command processor generates a sequence of commands for execution by either the CPU or the GPU in the command format. A compiler running a meta language converts program data for the commands into a first format readable by the CPU programming language and a second format readable by the GPU programming language.

Abstract: A method and system for a command processor for efficient processing of a program multi-processor core system with a CPU and GPU. The multi-core system includes a general purpose CPU executing commands in a CPU programming language and a graphic processing unit (GPU) executing commands in a GPU programming language. A command processor is coupled to the CPU and CPU. The command processor sequences jobs from a program for processing by the CPU or the GPU. The command processor creates commands from the jobs in a state free command format. The command processor generates a sequence of commands for execution by either the CPU or the GPU in the command format. A compiler running a meta language converts program data for the commands into a first format readable by the CPU programming language and a second format readable by the GPU programming language.

Abstract: A method and system for a command processor for efficient processing of a program multi-processor core system with a CPU and GPU. The multi-core system includes a general purpose CPU executing commands in a CPU programming language and a graphic processing unit (GPU) executing commands in a GPU programming language. A command processor is coupled to the CPU and CPU. The command processor sequences jobs from a program for processing by the CPU or the GPU. The command processor creates commands from the jobs in a state free command format. The command processor generates a sequence of commands for execution by either the CPU or the GPU in the command format. A compiler running a meta language converts program data for the commands into a first format readable by the CPU programming language and a second format readable by the GPU programming language.

Abstract: A method and system for a command processor for efficient processing of a program multi-processor core system with a CPU and GPU. The multi-core system includes a general purpose CPU executing commands in a CPU programming language and a graphic processing unit (GPU) executing commands in a GPU programming language. A command processor is coupled to the CPU and CPU. The command processor sequences jobs from a program for processing by the CPU or the GPU. The command processor creates commands from the jobs in a state free command format. The command processor generates a sequence of commands for execution by either the CPU or the GPU in the command format. A compiler running a meta language converts program data for the commands into a first format readable by the CPU programming language and a second format readable by the GPU programming language.

Abstract: A method and system for a command processor for efficient processing of a program multi-processor core system with a CPU and GPU. The multi-core system includes a general purpose CPU executing commands in a CPU programming language and a graphic processing unit (GPU) executing commands in a GPU programming language. A command processor is coupled to the CPU and CPU. The command processor sequences jobs from a program for processing by the CPU or the GPU. The command processor creates commands from the jobs in a state free command format. The command processor generates a sequence of commands for execution by either the CPU or the GPU in the command format. A compiler running a meta language converts program data for the commands into a first format readable by the CPU programming language and a second format readable by the GPU programming language.

Abstract: In a technique for rendering non-linear BRDFs that are stable in both the temporal and spatial domains, without serious interruption to the content creation pipeline used in most games, non-linear content is linearized by rendering in texture space at a fixed resolution. A MIP-map chain is calculated from this texture. The complete MIP-map chain is used for rendering on a display device. Low resolution reflectance parameters are used to approximate the highest resolution reflectance parameters as the object becomes smaller on the display device. The low resolution reflectance parameters are calculated using non linear fitting techniques.

Abstract: In a technique for rendering non-linear BRDFs that are stable in both the temporal and spatial domains, without serious interruption to the content creation pipeline used in most games, non-linear content is linearized by rendering in texture space at a fixed resolution. A MIP-map chain is calculated from this texture. The complete MIP-map chain is used for rendering on a display device. Low resolution reflectance parameters are used to approximate the highest resolution reflectance parameters as the object becomes smaller on the display device. The low resolution reflectance parameters are calculated using non linear fitting techniques.

Abstract: In a technique for rendering non-linear BRDFs that are stable in both the temporal and spatial domains, without serious interruption to the content creation pipeline used in most games, non-linear content is linearized by rendering in texture space at a fixed resolution. A MIP-map chain is calculated from this texture. The complete MIP-map chain is used for rendering on a display device. Low resolution reflectance parameters are used to approximate the highest resolution reflectance parameters as the object becomes smaller on the display device. The low resolution reflectance parameters are calculated using non linear fitting techniques.

Abstract: A shader program capable of execution on a GPU is analyzed for constant expressions. These constant expressions are replaced with references to registers or memory addresses on the GPU. A preshader is created that comprises two executable files. The first executable file contains the shader program with the each constant expression removed and replaced with a unique reference accessible by the GPU. The first file is executable at the GPU. A second file contains the removed constant expressions along with instructions to place the values generated at the associated reference. The second executable file is executable at a CPU. When the preshader is executed, an instance of the first file is executed at the GPU for each vertex or pixel that is displayed. One instance of the second file is executed at the CPU. As the preshader is executed, the constant expressions in the second file are evaluated and the resulting intermediate values are passed to each instance of the first file on the GPU.

Abstract: A shader program capable of execution on a GPU is analyzed for constant expressions. These constant expressions are replaced with references to registers or memory addresses on the GPU. A preshader is created that comprises two executable files. The first executable file contains the shader program with the each constant expression removed and replaced with a unique reference accessible by the GPU. The first file is executable at the GPU. A second file contains the removed constant expressions along with instructions to place the values generated at the associated reference. The second executable file is executable at a CPU. When the preshader is executed, an instance of the first file is executed at the GPU for each vertex or pixel that is displayed. One instance of the second file is executed at the CPU. As the preshader is executed, the constant expressions in the second file are evaluated and the resulting intermediate values are passed to each instance of the first file on the GPU.

Abstract: A shader program capable of execution on a GPU is analyzed for constant expressions. These constant expressions are replaced with references to registers or memory addresses on the GPU. A preshader is created that comprises two executable files. The first executable file contains the shader program with the each constant expression removed and replaced with a unique reference accessible by the GPU. The first file is executable at the GPU. A second file contains the removed constant expressions along with instructions to place the values generated at the associated reference. The second executable file is executable at a CPU. When the preshader is executed, an instance of the first file is executed at the GPU for each vertex or pixel that is displayed. One instance of the second file is executed at the CPU. As the preshader is executed, the constant expressions in the second file are evaluated and the resulting intermediate values are passed to each instance of the first file on the GPU.

Abstract: Usage semantics allow for shaders to be authored independently of the actual vertex data and accordingly enables their reuse. Usage semantics define a feature that binds data between distinct components to allow them to work together. In various embodiments, the components include high level language variables that are bound by an application or by vertex data streams, high level language fragments to enable several fragments to be developed separately and compiled at a later time together to form a single shader, assembly language variables that get bound to vertex data streams, and parameters between vertex and pixel shaders. This allows developers to be able to program the shaders in the assembly and high level language with variables that refer to names rather than registers. By allowing this decoupling of registers from the language, developers can work on the language separately from the vertex data and modify and enhance high level language shaders without having to manually manipulate the registers.

Abstract: Usage semantics allow for shaders to be authored independently of the actual vertex data and accordingly enables their reuse. Usage semantics define a feature that binds data between distinct components to allow them to work together. In various embodiments, the components include high level language variables that are bound by an application or by vertex data streams, high level language fragments to enable several fragments to be developed separately and compiled at a later time together to form a single shader, assembly language variables that get bound to vertex data streams, and parameters between vertex and pixel shaders. This allows developers to be able to program the shaders in the assembly and high level language with variables that refer to names rather than registers. By allowing this decoupling of registers from the language, developers can work on the language separately from the vertex data and modify and enhance high level language shaders without having to manually manipulate the registers.