Abstract: A serializer circuit may include a recovery circuit, an adjusting circuit, and a multiplexer circuit. The recovery circuit may be configured to receive a first data signal at a first frequency, to generate a first clock signal at the first frequency using the first data signal, and to retime the first data signal based on the first clock signal to generate a retimed first data signal. The adjusting circuit may be configured to receive a second data signal and retime the second data signal based on the first clock signal to generate a retimed second data signal. The multiplexer circuit may be configured to multiplex the retimed first data signal and the retimed second data signal.

Abstract: In an example embodiment, a phase-locked loop circuit may include a first circuitry to receive a reference signal and a source signal. The first circuitry may generate a correction signal for demonstrating a difference in phase between the reference signal and the source signal. The phase-locked loop may include a second circuitry to receive the correction signal. The second circuitry may generate a digital signal for demonstrating a phase-to-digital conversion of the correction signal. The phase-locked loop may include a third circuitry to receive the digital signal. The third circuitry may generate a control signal for demonstrating a converted voltage of the digital signal. The phase-locked loop may include a fourth circuitry to receive the control signal. The fourth circuitry may generate the source signal in response to the control signal.

Abstract: In an example embodiment, a phase-locked loop circuit may include a first circuitry to receive a reference signal and a source signal. The first circuitry may generate a correction signal for demonstrating a difference in phase between the reference signal and the source signal. The phase-locked loop may include a second circuitry to receive the correction signal. The second circuitry may generate a digital signal for demonstrating a phase-to-digital conversion of the correction signal. The phase-locked loop may include a third circuitry to receive the digital signal. The third circuitry may generate a control signal for demonstrating a converted voltage of the digital signal. The phase-locked loop may include a fourth circuitry to receive the control signal. The fourth circuitry may generate the source signal in response to the control signal.

Abstract: A serializer circuit may include a recovery circuit, an adjusting circuit, and a multiplexer circuit. The recovery circuit may be configured to receive a first data signal at a first frequency, to generate a first clock signal at the first frequency using the first data signal, and to retime the first data signal based on the first clock signal to generate a retimed first data signal. The adjusting circuit may be configured to receive a second data signal and retime the second data signal based on the first clock signal to generate a retimed second data signal. The multiplexer circuit may be configured to multiplex the retimed first data signal and the retimed second data signal.

Abstract: In an example embodiment, a phase-locked loop circuit may include a first circuitry to receive a reference signal and a source signal. The first circuitry may generate a correction signal for demonstrating a difference in phase between the reference signal and the source signal. The phase-locked loop may include a second circuitry to receive the correction signal. The second circuitry may generate a digital signal for demonstrating a phase-to-digital conversion of the correction signal. The phase-locked loop may include a third circuitry to receive the digital signal. The third circuitry may generate a control signal for demonstrating a converted voltage of the digital signal. The phase-locked loop may include a fourth circuitry to receive the control signal. The fourth circuitry may generate the source signal in response to the control signal.

Abstract: In an example embodiment, a phase-locked loop circuit may include a first circuitry to receive a reference signal and a source signal. The first circuitry may generate a correction signal for demonstrating a difference in phase between the reference signal and the source signal. The phase-locked loop may include a second circuitry to receive the correction signal. The second circuitry may generate a digital signal for demonstrating a phase-to-digital conversion of the correction signal. The phase-locked loop may include a third circuitry to receive the digital signal. The third circuitry may generate a control signal for demonstrating a converted voltage of the digital signal. The phase-locked loop may include a fourth circuitry to receive the control signal. The fourth circuitry may generate the source signal in response to the control signal.

Abstract: This disclosure concerns systems and devices configured to implement impedance matching schemes in a high speed data transmission environment. In one example, an optoelectronic assembly is provided that includes a TO package having a base through which one or more leads pass. The leads are electrically coupled to an optoelectronic device in the TO package, and are electrically isolated from the base. Some or all of the leads include a ground ring that is electrically isolated from the lead and electrically coupled with the base. A circuit interconnect is also included that is electrically coupled to the optoelectronic device and the TO package. The circuit interconnect includes a dielectric substrate having signal traces that are electrically coupled to the signal leads. A ground signal conductor disposed on the dielectric substrate is electrically coupled with the ground rings.

Abstract: An optoelectronic transceiver is provided that includes a laser driver in communication with an optical transmitter. The laser driver includes an operational amplifier having three stages and connected with an optical transmitter. The first stage includes a differential amplifier that receives a reference voltage input, corresponding to a desired magnitude of the optical transmitter voltage, and an optical transmitter voltage input, representing an optical output strength of the optical transmitter, and having transconductance that increases exponentially as a difference between the reference voltage and the optical transmitter voltage increases. The differential amplifier generates an output current based on the inputs. The second stage integrates the output current to generate a first output voltage.

Abstract: An optoelectronic assembly includes a transistor outline (TO) package that houses an optoelectronic device. The TO package and the optoelectronic device are coupled to a circuit interconnect. The circuit interconnect includes an insulator having a first side for transmitting a signal current between the optoelectronic device and a device external to the TO package, and a second side for transmitting a ground current between the TO package and the external device. For a predefined operating frequency range, the impedance of the circuit interconnect approximately matches the impedance of the signal leads of the TO package and also approximately matches the impedance of the device external to the TO package. The optoelectronic device may include a laser diode or a photo diode. In addition, the present invention is an optoelectronic transceiver including a transmitter optoelectronic assembly and a receiver optoelectronic assembly.

Abstract: The optoelectronic device includes a photo diode and an amplifier, which amplifies output of the photo diode. The amplifier includes an input stage and an output stage. In one embodiment, the input stage has a series connection to a resistor, which is connected to a ground. The output stage has a connection to ground that does not overlap the series connection. In another embodiment, the input stage has a first connection to a bypass capacitor, which is connected to a power source. The output stage has a separate, second connection to the capacitor, which prevents high frequencies from flowing between the input stage and said output stage via a connection to the power source.

Abstract: The present invention relates generally to laser diodes, and particularly to an operational amplifier able to switch laser diodes on and off quickly without adversely affecting data transmission by the laser diodes. A differential amplifier included in an operational amplifier has a high transconductance when a laser diode is first turned on and a low, near constant transconductance when the laser diode is transmitting data. The operational amplifier is preferably incorporated in optoelectronic transceivers used in passive optical networks. Switching laser diodes on and off quickly enables more efficient use of network bandwidth in such passive optical networks.

Abstract: The present invention relates generally to laser diodes, and particularly to an operational amplifier able to switch laser diodes on and off quickly without adversely affecting data transmission by the laser diodes. A differential amplifier included in an operational amplifier has a high transconductance when a laser diode is first turned on and a low, near constant transconductance when the laser diode is transmitting data. The operational amplifier is preferably incorporated in optoelectronic transceivers used in passive optical networks. Switching laser diodes on and off quickly enables more efficient use of network bandwidth in such passive optical networks.

Abstract: The optoelectronic device includes a photo diode and an amplifier, which amplifies output of the photo diode. The amplifier includes an input stage and an output stage. In one embodiment, the input stage has a series connection to a resistor, which is connected to a ground. The output stage has a connection to ground that does not overlap the series connection. In another embodiment, the input stage has a first connection to a bypass capacitor, which is connected to a power source. The output stage has a separate, second connection to the capacitor, which prevents high frequencies from flowing between the input stage and said output stage via a connection to the power source.

Abstract: An optoelectronic assembly includes a transistor outline (TO) package that houses an optoelectronic device. The TO package and the optoelectronic device are coupled to a circuit interconnect. The circuit interconnect includes an insulator having a first side for transmitting a signal current between the optoelectronic device and a device external to the TO package, and a second side for transmitting a ground current between the TO package and the external device. For a predefined operating frequency range, the impedance of the circuit interconnect approximately matches the impedance of the signal leads of the TO package and also approximately matches the impedance of the device external to the TO package. The optoelectronic device may include a laser diode or a photo diode. In addition, the present invention is an optoelectronic transceiver including a transmitter optoelectronic assembly and a receiver optoelectronic assembly.