Abstract: The invention seeks to make it possible to display an image in three dimensions without additional display means, and to furnish a device that is easy to implement and applicable to drawings and paintings. To that end, a purpose of the invention is a direct display panel of images in three dimensions that comprises a bottom panel (1) and at least one structural panel (2, 3) provided with at least one cut-out defining at least two strips (2a to 2b, 3b, 3d). The strips are attached above the bottom panel (1) by attachment means (5) so that at least a portion of strip (2a to 2g, 3b, 3d) of the structure panel is at a defined distance (d, d1, d2) from the panel (1, 2, 3) on which said strip is attached.

Abstract: The invention seeks to make it possible to display an image in three dimensions without additional display means, and to furnish a device that is easy to implement and applicable to drawings and paintings. To that end, a purpose of the invention is a direct display panel of images in three dimensions that comprises a bottom panel (1) and at least one structural panel (2, 3) provided with at least one cut-out defining at least two strips (2a to 2b, 3b, 3d). The strips are attached above the bottom panel (1) by attachment means (5) so that at least a portion of strip (2a to 2g, 3b, 3d) of the structure panel is at a defined distance (d, d1, d2) from the panel (1, 2, 3) on which said strip is attached.

Abstract: A simulator tool for efficiently modeling a semiconductor transistor structure of varying channel lengths. Process simulation of a transistor structure is performed for a half NMOS transistor structure only, followed by separate computations to expand the half-structure to a full structure of varying channel lengths. Standard device simulations are then performed on the full structures to simulate electrical properties of interest, such as threshold voltage (V.sub.T) and saturation drive current (I.sub.DSAT) The tool thereby constructs a virtual model of transistor structure fabrications that can be graphically displayed to correlate process parameters with the electrical properties for use in predicting results in actual manufacturing.