Abstract: An RF switch includes series-coupled RF switch cells coupled between an RF input and ground, each RF switch cell having an input, and a biasing network having outputs for individually biasing each of the RF switch cell inputs to a distinct bias voltage based upon a rank number of the RF switch cell.

Abstract: An RF switch includes series-coupled RF switch cells coupled between an RF input and ground, each RF switch cell having an input, and a biasing network having outputs for individually biasing each of the RF switch cell inputs to a distinct bias voltage based upon a rank number of the RF switch cell

Abstract: According to an embodiment, a circuit package includes a programmable switch component having a plurality of input terminals arranged on the programmable switch component, a plurality of output terminals arranged on the programmable switch component and configured to be coupled to a plurality of amplifiers, and a plurality of switches. Each switch of the plurality of switches is coupled between an input terminal of the plurality of input terminals and an output terminal of the plurality of output terminals. Each switch of the plurality of switches includes a radio frequency (RF) switch and is configured to pass an RF signal when closed. Each input terminal of the plurality of input terminals is coupled to two switches of the plurality of switches.

Abstract: In accordance with an embodiment of the present invention, a chip set for a mobile device includes a slave device chip and an interface circuit chip that includes a slave bus interface for controlling the slave device chip through an analog bus. The slave bus interface is coupled to a master bus interface via a digital bus of the mobile device. The slave bus interface is configured to be driven by the master bus interface.

Abstract: In accordance with an embodiment, a circuit includes a first directional coupler comprising a first input port, a first transmitted port, a first isolated port and a first coupled port, where the first directional coupler disposed on a first substrate. The circuit also includes a first direction select switch having a first switch input port coupled to the first isolated port, a second switch input port coupled to the first coupled port, and a first switch output port, where the first direction select switch is disposed on the first substrate along with the directional coupler.

Abstract: An embodiment described herein includes a low noise amplifier (LNA) including a plurality of separate input terminals, a plurality of transistors, and an output network coupled to a first reference terminal and a single output of the LNA. Each transistor includes a conduction path and a control terminal coupled to one of the plurality of separate input terminals. The output network is also coupled to the conduction path of each of the plurality of transistors.

Abstract: In accordance with an embodiment, a circuit includes a low noise amplifier transistor disposed on a first integrated circuit, a single pole multi throw (SPMT) switch disposed on a second integrated circuit, and a bypass switch coupled between a control node of the low noise amplifier transistor and an output node of the low noise amplifier transistor. The SPMT switch couples a plurality of module input terminals to a control node of the low noise amplifier transistor, and the bypass switch including a first switch coupled between the control node of the low noise amplifier transistor and an intermediate node, a second switch coupled between the intermediate node and the output node of the low noise amplifier transistor, and a third switch coupled between the intermediate node and a first reference node. The first integrated circuit and the second integrated circuit are disposed on a substrate.

Abstract: In various embodiments, a package arrangement may be provided. The package arrangement may include at least one chip. The package arrangement may further include encapsulation material at least partially encapsulating the chip. The package arrangement may also include a redistribution structure over a first side of the chip. The package arrangement may further include a metal structure over a second side of the chip. The second side may be opposite the first side. The package arrangement may additionally include at least one of a semiconductor structure and an electrically conductive plastic material structure electrically coupled to the redistribution structure and the metal structure to form a current path between the redistribution structure and the metal structure.

Abstract: A module and a method for manufacturing a module are disclosed. An embodiment of a module includes a first semiconductor device, a frame arranged on the first semiconductor device, the frame including a cavity, and a second semiconductor device arranged on the frame wherein the second semiconductor device seals the cavity.

Abstract: A circuit includes a current sensing circuit comprising a current input terminal coupled to an input port, a current output terminal coupled to a transmitted port, and a current sensing output terminal configured to provide a current sensing signal proportional to a current flowing between the current input terminal and the current output terminal. The circuit further includes a voltage sensing circuit having a voltage input terminal coupled to the transmitted port and a voltage sensing output terminal configured to provide a voltage sensing signal proportional to a voltage at the transmitted port. A combining circuit has a first input coupled to the current sensing output terminal, a second input coupled to the voltage sensing output terminal, and a combined output node coupled to an output port.

Abstract: According to an embodiment, a circuit package includes a programmable switch component having a plurality of input terminals arranged on the programmable switch component, a plurality of output terminals arranged on the programmable switch component and configured to be coupled to a plurality of amplifiers, and a plurality of switches. Each switch of the plurality of switches is coupled between an input terminal of the plurality of input terminals and an output terminal of the plurality of output terminals. Each switch of the plurality of switches includes a radio frequency (RF) switch and is configured to pass an RF signal when closed. Each input terminal of the plurality of input terminals is coupled to two switches of the plurality of switches.

Abstract: According to an embodiment, a circuit package includes a programmable switch component having a plurality of input terminals arranged on the programmable switch component, a plurality of output terminals arranged on the programmable switch component and configured to be coupled to a plurality of amplifiers, and a plurality of switches. Each switch of the plurality of switches is coupled between an input terminal of the plurality of input terminals and an output terminal of the plurality of output terminals. Each switch of the plurality of switches includes a radio frequency (RF) switch and is configured to pass an RF signal when closed. Each input terminal of the plurality of input terminals is coupled to two switches of the plurality of switches.

Abstract: In accordance with an embodiment, a circuit includes a first signal path coupled between an input port and an output port, and a second coupled between the input port and the output port in parallel with the first signal path. The first signal path includes a low noise amplifier (LNA) having an input node coupled to the input port, and the second signal path includes a switch coupled between the input port and the output port.

Abstract: In accordance with an embodiment, a circuit includes a low noise amplifier transistor disposed on a first integrated circuit, a single pole multi throw (SPMT) switch disposed on a second integrated circuit, and a bypass switch coupled between a control node of the low noise amplifier transistor and an output node of the low noise amplifier transistor. The SPMT switch couples a plurality of module input terminals to a control node of the low noise amplifier transistor, and the bypass switch including a first switch coupled between the control node of the low noise amplifier transistor and an intermediate node, a second switch coupled between the intermediate node and the output node of the low noise amplifier transistor, and a third switch coupled between the intermediate node and a first reference node. The first integrated circuit and the second integrated circuit are disposed on a substrate.

Abstract: An embodiment described herein includes a low noise amplifier (LNA) including a plurality of separate input terminals, a plurality of transistors, and an output network coupled to a first reference terminal and a single output of the LNA. Each transistor includes a conduction path and a control terminal coupled to one of the plurality of separate input terminals. The output network is also coupled to the conduction path of each of the plurality of transistors.

Abstract: An embodiment described herein includes a low noise amplifier (LNA) including a plurality of separate input terminals, a plurality of transistors, and an output network coupled to a first reference terminal and a single output of the LNA. Each transistor includes a conduction path and a control terminal coupled to one of the plurality of separate input terminals. The output network is also coupled to the conduction path of each of the plurality of transistors.

Abstract: In accordance with an embodiment, a circuit includes a low noise amplifier transistor disposed on a first integrated circuit, a single pole multi throw (SPMT) switch disposed on a second integrated circuit, and a bypass switch coupled between a control node of the low noise amplifier transistor and an output node of the low noise amplifier transistor. The SPMT switch couples a plurality of module input terminals to a control node of the low noise amplifier transistor, and the bypass switch including a first switch coupled between the control node of the low noise amplifier transistor and an intermediate node, a second switch coupled between the intermediate node and the output node of the low noise amplifier transistor, and a third switch coupled between the intermediate node and a first reference node. The first integrated circuit and the second integrated circuit are disposed on a substrate.

Abstract: In accordance with an embodiment, a circuit includes a first directional coupler comprising a first input port, a first transmitted port, a first isolated port and a first coupled port, where the first directional coupler disposed on a first substrate. The circuit also includes a first direction select switch having a first switch input port coupled to the first isolated port, a second switch input port coupled to the first coupled port, and a first switch output port, where the first direction select switch is disposed on the first substrate along with the directional coupler.

Abstract: In accordance with an embodiment, a circuit includes a first signal path coupled between an input port and an output port, and a second coupled between the input port and the output port in parallel with the first signal path. The first signal path includes a low noise amplifier (LNA) having an input node coupled to the input port, and the second signal path includes a switch coupled between the input port and the output port.

Abstract: In accordance with an embodiment, a radio-frequency (RF) front-end for a radio configured to receive an RF signal at a first frequency includes an antenna port configured to be coupled to an antenna, and a notch filter having an input coupled to the antenna port. The notch filter is configured to reject one or more frequencies, such that the first frequency is a harmonic or intermodulation distortion product of the one or more frequencies. The RF front-end also includes a piezoelectric filter having an input coupled to an output of the notch filter and an output configured to be coupled to an RF amplifier. The piezoelectric filter has a pass band comprising the first frequency.