Abstract: The invention relates to a peptide comprising an amino acid sequence selected from the group consisting of (i) SEQ ID NO: 1 to SEQ ID NO: 216, and (ii) a variant sequence thereof which maintains capacity to bind to MHC molecule(s) and/or induce T cells cross-reacting with said variant peptide, or a pharmaceutically acceptable salt thereof.

Abstract: A method for estimating noise in a radar sensor, which generates a digital spectrum which indicates a received signal strength as a function of at least one discrete locating parameter, and on this spectrum a CFAR detection is carried out to decide whether an examined cell in the locating space contains a genuine radar target or just noise and a determination of a noise level is also carried out on the basis of the signal strengths in a selection of neighboring cells in the vicinity of the examined cell. The CFAR detection precedes the determination of the noise level and cells identified in the CFAR detection as target cells are excluded from the selection of the neighboring cells.

Abstract: A sensor for parallel measurement of pressure and acceleration of a vehicle, including a substrate, a sensor element disposed on the substrate, a material being connected with the sensor element and being exposed to the environment of the sensor, wherein the material is configured to act as a seismic mass, and an electronic circuitry connected with the sensor element and including a first filter and a second filter, wherein the first and second filters have different filter characteristics so that an output of the first filter is representative for the pressure and an output of the second is representative for the acceleration.

Abstract: A household appliance includes a housing, a door pivotably connected to the housing, a cable having one end connected to the door, a motor, and a cable drum onto which the cable can be unwound at least in partial and from which the cable can be unwound at least in part. The cable and the motor interact such that the door pivots when winding the cable onto the cable drum or when the cable unwinds from the cable drum.

Abstract: A sensor system with a first semiconductor die part and with a second semiconductor die part is proposed, wherein the first semiconductor die part has a microelectromechanical sensor element, wherein the second semiconductor die part covers the microelectromechanical sensor element, wherein the second semiconductor die part has a via for electrically contacting the microelectromechanical sensor element, in particular directly. A method for producing a sensor system is also proposed.

Abstract: A method for operating a water-bearing household appliance for treating articles, in particular a dishwasher or washing machine, the water-bearing household appliance including a treatment chamber for treating the articles with a washing liquor and a dosing system for dispensing a dosing-amount of detergent provided by a dosing unit, the method comprising: selecting one of a plurality of different treatment cycles, controlling the water-bearing household appliance to perform the selected treatment cycle, actuating the dosing system to dispense the dosing-amount of detergent according to the selected treatment cycle, detecting a sensor signal of the dispensed dosing-amount of detergent, adjusting the selected treatment cycle as a function of the detected sensor signal, and controlling the water-bearing household appliance to perform the adjusted treatment cycle.

Abstract: A protective glazing is provided that has long-term stability against degradation under high temperatures. The protective glazing includes a glass or glass ceramic pane having two opposite faces and being transparent in the visible spectral range and an infrared radiation reflecting coating on at least one of the faces. The coating includes a first layer on the face and a second layer deposited on the first layer. The first layer is a doped transparent conductive oxide and the second layer is an X-ray amorphous oxide layer or of a nitride layer.

Abstract: A household appliance includes a housing, a door pivotably connected to the housing, a cable having one end connected to the door, a motor, and a cable drum onto which the cable can be unwound at least in partial and from which the cable can be unwound at least in part. The cable and the motor interact such that the door pivots when winding the cable onto the cable drum or when the cable unwinds from the cable drum.

Abstract: A protective glazing is provided that has long-term stability against degradation under high temperatures. The protective glazing includes a glass or glass ceramic pane having two opposite faces and being transparent in the visible spectral range and an infrared radiation reflecting coating on at least one of the faces. The coating includes a first layer on the face and a second layer deposited on the first layer. The first layer is a doped transparent conductive oxide and the second layer is an X-ray amorphous oxide layer or of a nitride layer.

Abstract: An integrated circuit device includes a substrate with a first layer situated on the substrate. The first layer defines a first opening with a cover layer deposited on the first layer and coating a sidewall portion of the first opening. A second layer is situated on the cover layer. The second layer defines a second opening extending through the second layer and through the cover layer to connect the first and second openings.

Abstract: In a method of fabricating a semiconductor structure, a carbon containing mask is fabricated over a dielectric layer. The mask exposes the surface of the dielectric layer at least partly in a region between two adjacent conducting lines. A contact hole is etched into the dielectric layer in the region between the two adjacent conducting lines.

Abstract: The present invention provides a manufacturing method for an integrated semiconductor structure comprising the steps of providing a semiconductor substrate having a plurality of gate stacks in a memory cell region and at least one gate stack in a peripheral device region; forming caps made of one or more layers of a cap material over said plurality of gate stacks in said memory cell region and over said at least one gate stack in said peripheral device region; depositing a first protective layer made of carbon or made of a carbon containing material over said memory cell region and peripheral device region; forming a mask layer on said first protective layer in said memory cell region; exposing said cap of said at least one gate stack in said peripheral device region by removing said first protective layer in said peripheral device region in an etch step wherein said mask layer acts as a mask in said memory cell region; removing said mask layer and said first protective layer from said memory cell region; for

Abstract: Embodiments of the invention relate to a method of fabricating an integrated circuit, including etching of a layer that includes a high k material in the form of a metal oxide composition, wherein an etchant is used that includes a silicon halogen composition.

Abstract: In a method of fabricating a semiconductor structure, a carbon containing mask is fabricated over a dielectric layer. The mask exposes the surface of the dielectric layer at least partly in a region between two adjacent conducting lines. A contact hole is etched into the dielectric layer in the region between the two adjacent conducting lines.

Abstract: An integrated circuit having an active semiconductor device is formed comprising a trench defined by conductor lines previously formed.

Abstract: In one aspect, the invention provides a fabrication method. Before the fabrication of the structure, a mask layer, for example a hard mask, is applied to a layer. The mask layer has at least two layers composed of materials that can be etched selectively with respect to one another. In a first etching process, the structure is introduced into the layer. Subsequently, the first etching process is interrupted at a point in time in order to etch away a topmost layer of the hard mask selectively with respect to the underlying layer by means of a second etching process and, subsequently, the first etching process is continued for fabricating the structure with the new topmost layer.

Abstract: The present invention provides a manufacturing method for an integrated semiconductor structure comprising the steps of providing a semiconductor substrate having a plurality of gate stacks in a memory cell region and at least one gate stack in a peripheral device region; forming caps made of one or more layers of a cap material over said plurality of gate stacks in said memory cell region and over said at least one gate stack in said peripheral device region; depositing a first protective layer made of carbon or made of a carbon containing material over said memory cell region and peripheral device region; forming a mask layer on said first protective layer in said memory cell region; exposing said cap of said at least one gate stack in said peripheral device region by removing said first protective layer in said peripheral device region in an etch step wherein said mask layer acts as a mask in said said memory cell region; removing said said mask layer and said first protective layer from said memory cell r

Abstract: A method teaches how to fill trench structures formed in a semiconductor substrate. The trench structures are coated in a first deposition process with a first primary filling layer with a high conformity and minimal roughness. A V etching reaching down to a predetermined depth of the trench structure is subsequently performed in order to produce a V-profile.

Abstract: A memory device includes an array of memory cells and a storage capacitor for storing information. Each memory cell includes an access transistor. The access transistor includes first and second source/drain regions, a channel disposed between the first and the second source/drain regions, and a gate electrode electrically insulated from the channel and adapted to control the conductivity of the channel. The access transistor is at least partially formed in the semiconductor substrate. The storage capacitor is adapted to be accessed by the access transistor. The storage capacitor includes at least first and second storage electrodes and at least a capacitor dielectric disposed between the first and the second storage electrodes. Each of the first and the second storage electrodes is disposed above the substrate surface.