Abstract: A battery module includes a first side rail, a second side rail, one or more battery cell banks, and one or more battery cell separators. The one or more battery cell banks are positioned between the first side rail and the second side rail. The one or more battery cell separators are positioned within the one or more battery cell banks and configured to separate one or more battery cells positioned adjacent one another. The one or more battery cell separators include one or more cell barriers and a support structure. The one or more cell barriers are positioned adjacent the one or more battery cell banks. The support structure is positioned between the one or more cell barriers. The one or more battery cell separators are configured to propagate thermal energy produced from the one or more battery cells.

Abstract: A battery module includes a first side rail, a second side rail, one or more battery cell banks, and one or more battery cell separators. The one or more battery cell banks are positioned between the first side rail and the second side rail. The one or more battery cell separators are positioned within the one or more battery cell banks and configured to separate one or more battery cells positioned adjacent one another. The one or more battery cell separators include one or more cell barriers and a support structure. The one or more cell barriers are positioned adjacent the one or more battery cell banks. The support structure is positioned between the one or more cell barriers. The one or more battery cell separators are configured to propagate thermal energy produced from the one or more battery cells.

Abstract: A method for selectively etching SiN with respect to SiO or SiGe or Si of a structure is provided comprising providing a plurality of cycles of atomic layer etching. Each cycle comprises a fluorinated polymer deposition phase comprising flowing a fluorinated polymer deposition gas comprising a hydrofluorocarbon gas into the plasma processing chamber, forming the fluorinated polymer deposition gas into a plasma, which deposits a hydrofluorocarbon polymer layer on the structure, and stopping the flow of the fluorinated polymer deposition gas into the plasma processing chamber and an activation phase comprising flowing an activation gas comprising at least one of NH3 or H2 into the plasma processing chamber, forming the activation gas into a plasma, wherein plasma components from NH3 or H2 cause SiN to be selectively etched with respect to SiO or SiGe or Si, and stopping the flow of the activation gas into the plasma processing chamber.

Abstract: A method for selectively etching SiN with respect to SiO or SiGe or Si of a structure is provided comprising providing a plurality of cycles of atomic layer etching. Each cycle comprises a fluorinated polymer deposition phase comprising flowing a fluorinated polymer deposition gas comprising a hydrofluorocarbon gas into the plasma processing chamber, forming the fluorinated polymer deposition gas into a plasma, which deposits a hydrofluorocarbon polymer layer on the structure, and stopping the flow of the fluorinated polymer deposition gas into the plasma processing chamber and an activation phase comprising flowing an activation gas comprising at least one of NH3 or H2 into the plasma processing chamber, forming the activation gas into a plasma, wherein plasma components from NH3 or H2 cause SiN to be selectively etched with respect to SiO or SiGe or Si, and stopping the flow of the activation gas into the plasma processing chamber.

Abstract: A method for selectively etching SiO and SiN with respect to SiGe or Si of a structure is provided. A plurality of cycles of atomic layer etching is provided, where each cycle comprises a fluorinated polymer deposition phase and an activation phase. The fluorinated polymer deposition phase comprises flowing a fluorinated polymer deposition gas comprising a fluorocarbon gas, forming the fluorinated polymer deposition gas into a plasma, which deposits a fluorocarbon polymer layer on the structure, and stopping the flow of the fluorinated polymer deposition gas. The activation phase comprises flowing an activation gas comprising an inert bombardment gas and H2, forming the activation gas into a plasma, wherein the inert bombardment gas activates fluorine in the fluorinated polymer which with the plasma components from H2 cause SiO and SiN to be selectively etched with respect to SiGe and Si, and stopping the flow of the activation gas.

Abstract: A method for etching features in a low-k dielectric layer disposed below an organic mask is provided by an embodiment of the invention. Features are etched into the low-k dielectric layer through the organic mask. A fluorocarbon layer is deposited on the low-k dielectric layer. The fluorocarbon layer is cured. The organic mask is stripped.

Abstract: A method for etching features in a low-k dielectric layer disposed below an organic mask is provided by an embodiment of the invention. Features are etched into the low-k dielectric layer through the organic mask. A fluorocarbon layer is deposited on the low-k dielectric layer. The fluorocarbon layer is cured. The organic mask is stripped.

Abstract: A method for etching a trench to a trench depth in a dielectric layer over a substrate is provided. An ARC is applied over the dielectric layer. A photoresist mask is formed on the ARC, where the photoresist mask has a thickness. The ARC is etched through. A trench is etched into the dielectric layer with a dielectric to photoresist etch selectivity between 1:1 and 2:1.

Abstract: A method for etching a trench to a trench depth in a dielectric layer over a substrate is provided. An ARC is applied over the dielectric layer. A photoresist mask is formed on the ARC, where the photoresist mask has a thickness. The ARC is etched through. A trench is etched into the dielectric layer with a dielectric to photoresist etch selectivity between 1:1 and 2:1.

Abstract: A method for etching a trench to a trench depth in a dielectric layer over a substrate is provided. An ARC is applied over the dielectric layer. A photoresist mask is formed on the ARC, where the photoresist mask has a thickness. The ARC is etched through. A trench is etched into the dielectric layer with a dielectric to photoresist etch selectivity between 1:1 and 2:1.