Patents by Inventor Daniel Lee Avery

Daniel Lee Avery has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7219278
    Abstract: A circuit testing approach involves configurable switch control for automatically detecting and routing test signals along a plurality of test circuit paths. According to an example embodiment of the present invention, a configurator arrangement (100) is programmed to control a configured circuit (110), the control including automatically setting switches (115) on the configured circuit. In one implementation, the configurator arrangement is programmed to automatically detect test signals (i.e., digital and/or JTAG test signals) and to control switches (115) for routing test data along a test circuit path. With this approach, manual switching for routing the test signals is not necessary, which has been found to be useful in applications where access to the circuit paths for switching is difficult or impossible.
    Type: Grant
    Filed: March 8, 2004
    Date of Patent: May 15, 2007
    Assignee: NXP B.V.
    Inventors: Daniel Lee Avery, Michael J. Smith, Joel Patrick Bailey, Randall Pendley
  • Patent number: 7117274
    Abstract: A circuit testing and control approach involves configurable switch control for automatically detecting and routing test signals along a plurality of test circuit paths. According to an example embodiment of the present invention, graphical user interface (GUI) (240) includes stored computer-executable code that, when executed, causes a micro-computer circuit to send configuration signals to a microcontroller (220). A configurable circuit (215) coupled to the microcontroller is then configured by the microcontroller, in response to the configuration signals, for routing test signals using controllable switches. In one implementation, the configurable circuit includes circuits on inter-connectable circuit boards (210, 250, 260), with sense nodes for detecting the presence of an inter-connectable circuit board coupled to another. In response to the detected presence (or lack thereof), the controllable switches control the routing of the test signals between the inter-connectable circuit boards.
    Type: Grant
    Filed: March 5, 2004
    Date of Patent: October 3, 2006
    Assignee: Koninklijke Philips Electronics N.V.
    Inventors: Daniel Lee Avery, Michael J. Smith, Joel Patrick Bailey, Jerry Schumacher
  • Publication number: 20040193980
    Abstract: A circuit testing approach involves configurable switch control for automatically detecting and routing test signals along a plurality of test circuit paths. According to an example embodiment of the present invention, a configurator arrangement (100) is programmed to control a configured circuit (110), the control including automatically setting switches (115) on the configured circuit. In one implementation, the configurator arrangement is programmed to automatically detect test signals (i.e., digital and/or JTAG test signals) and to control switches (115) for routing test data along a test circuit path. With this approach, manual switching for routing the test signals is not necessary, which has been found to be useful in applications where access to the circuit paths for switching is difficult or impossible.
    Type: Application
    Filed: March 8, 2004
    Publication date: September 30, 2004
    Applicant: Koninklijke Philips Electronics N.V.
    Inventors: Daniel Lee Avery, Michael J. Smith, Joel Patrick Bailey, Randall Pendley
  • Publication number: 20040193979
    Abstract: A circuit testing approach involves configurable switch control for automatically detecting and routing test signals along a plurality of test circuit paths. According to an example embodiment of the present invention, a configurator arrangement (100) controls a configured circuit (110) by monitoring test signals and, in response, setting switches (115) on the configured circuit. In one implementation, the configurator circuit arrangement is programmed to automatically detect test signals (i.e., digital and/or JTAG test signals) and to control switches (115) for routing test data along a test circuit path on the configured circuit and/or between the configured circuit and an external circuit. With this approach, manual switching for routing the test signals is not necessary, which has been found to be useful in applications where access to the circuit paths for switching is difficult or impossible.
    Type: Application
    Filed: March 8, 2004
    Publication date: September 30, 2004
    Applicant: Koninklijke Philips Electronics N.V.
    Inventors: Daniel Lee Avery, Joel Patrick Bailey, Randall Pendley, Allyn Farmer
  • Patent number: 6406517
    Abstract: The separation factor with respect to a gas binary of a selectively gas permeable membrane of a fluoropolymer can be increased by fabricating the membrane from a composition of a blend of the fluoropolymer with a nonfugitive, nonpolymeric fluorinated adjuvant. The composition can be made by dissolving the adjuvant and the polymer in a suitably compatible solvent then forming the membrane from the solution for example by casting, dipping, or spraying the solution on a substrate and devolatilizing the solvent. The extent of the selectivity increase varies widely with the combination of fluoropolymer and adjuvant and largely increases in direct relation with the proportion of adjuvant in the membrane composition.
    Type: Grant
    Filed: September 8, 2000
    Date of Patent: June 18, 2002
    Assignee: CMS Technology Holdings, Inc.
    Inventors: Daniel Lee Avery, Purushottam V. Shanbhag