Patents by Inventor Daniel Lee Revier

Daniel Lee Revier has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240145526
    Abstract: In described examples, an integrated circuit comprises: a substrate; a semiconductor die on the substrate; and a device on the substrate and electrically coupled to the semiconductor die, the device including a polymer structure coated with a metal.
    Type: Application
    Filed: January 4, 2024
    Publication date: May 2, 2024
    Applicant: Texas Instruments Incorporated
    Inventors: Benjamin Stassen Cook, Daniel Lee Revier
  • Publication number: 20240109247
    Abstract: A layer of additive material is formed in a circular printing area on a substrate using additive sources distributed across a printing zone. The additive sources form predetermined discrete amounts of the additive material. The substrate and the additive sources are rotated with respect to each other around a center of rotation, so that a pattern of the additive material is formed in a circular printing area on the substrate. Each additive source receives actuation waveforms at an actuation frequency that is proportional to a distance of the additive source from the center of rotation. The actuation waveforms include formation signals, with a maximum of one formation signal in each cycle of the actuation frequency. The formation signals result in the additive sources forming the predetermined discrete amounts of the additive material on the substrate.
    Type: Application
    Filed: December 4, 2023
    Publication date: April 4, 2024
    Inventors: Daniel Lee Revier, Sean Ping Chang, Benjamin Stassen Cook
  • Patent number: 11869925
    Abstract: In described examples, a method for fabricating a semiconductor device and a three dimensional structure, and packaging them together, includes: fabricating the integrated circuit on a substrate, immersing the substrate in a liquid encapsulation material, and illuminating the liquid encapsulation material to polymerize the liquid encapsulation material. Immersing the semiconductor device is performed to cover a layer of a platform in the liquid encapsulation material. The platform is a lead frame, a packaging substrate, or the substrate. The illuminating step targets locations of the liquid encapsulation material covering the layer. Illuminated encapsulation material forms solid encapsulation material that is fixedly coupled to contiguous portions of the semiconductor device and of the solid encapsulation material. The immersing and illuminating steps are repeated until a three dimensional structure is formed. The integrated circuit and the three dimensional structure are encapsulated in a single package.
    Type: Grant
    Filed: February 1, 2021
    Date of Patent: January 9, 2024
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Benjamin Stassen Cook, Daniel Lee Revier
  • Patent number: 11865773
    Abstract: A layer of additive material is formed in a circular printing area on a substrate using additive sources distributed across a printing zone. The additive sources form predetermined discrete amounts of the additive material. The substrate and the additive sources are rotated with respect to each other around a center of rotation, so that a pattern of the additive material is formed in a circular printing area on the substrate. Each additive source receives actuation waveforms at an actuation frequency that is proportional to a distance of the additive source from the center of rotation. The actuation waveforms include formation signals, with a maximum of one formation signal in each cycle of the actuation frequency. The formation signals result in the additive sources forming the predetermined discrete amounts of the additive material on the substrate.
    Type: Grant
    Filed: November 11, 2019
    Date of Patent: January 9, 2024
    Assignee: Texas Instruments Incorporated
    Inventors: Daniel Lee Revier, Sean Ping Chang, Benjamin Stassen Cook
  • Patent number: 11854933
    Abstract: In described examples, a semiconductor wafer with a thermally conductive surface layer comprises a bulk semiconductor layer having a first surface and a second surface, circuitry on the first surface, a metallic layer attached to the first surface or the second surface, and a graphene layer attached to the metallic layer. The first surface opposes the second surface. The metallic layer comprises a transition metal.
    Type: Grant
    Filed: December 30, 2020
    Date of Patent: December 26, 2023
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Benjamin Stassen Cook, Nazila Dadvand, Archana Venugopal, Daniel Lee Revier
  • Publication number: 20230335355
    Abstract: A switch that includes a droplet capable of spreading between two conductors to allow them to be coupled when a voltage is applied. The droplet can be enclosed by a cap that is bonded to a wafer that the droplet is placed upon, and include metallic properties. The cap can create a cavity that may be filled by a fluid, gas, or vapor. The cavity can have multiple conductors that extend partially or fully through it. The droplet can couple the conductors when specific voltages, or frequencies are applied to them. At the specific voltage and frequency, the droplet can spread, allowing at least two conductors to be coupled.
    Type: Application
    Filed: June 23, 2023
    Publication date: October 19, 2023
    Inventors: Adam Joseph Fruehling, Dishit Paresh Parekh, Daniel Lee Revier, Benjamin Stassen Cook
  • Patent number: 11728111
    Abstract: A switch that includes a droplet capable of spreading between two conductors to allow them to be coupled when a voltage is applied. The droplet can be enclosed by a cap that is bonded to a wafer that the droplet is placed upon, and include metallic properties. The cap can create a cavity that may be filled by a fluid, gas, or vapor. The cavity can have multiple conductors that extend partially or fully through it. The droplet can couple the conductors when specific voltages, or frequencies are applied to them. At the specific voltage and frequency the droplet can spread allowing at least two conductors to be coupled.
    Type: Grant
    Filed: December 27, 2018
    Date of Patent: August 15, 2023
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Adam Joseph Fruehling, Dishit Paresh Parekh, Daniel Lee Revier, Benjamin Stassen Cook
  • Patent number: 11693235
    Abstract: An apparatus includes a mass detection circuit coupled to a surface covered with a plurality of electrodes. The mass detection circuit is configured to detect a mass of a first droplet present on the surface. The apparatus further includes a transducer circuit coupled to a transducer, which is coupled to the surface and form a lens unit. The transducer circuit configured to excite a first vibration of the surface at a resonant frequency to form a high displacement region on the surface. The apparatus also includes a voltage excitation circuit coupled to the plurality of electrodes. In response to the detection of the mass of the first droplet, the voltage excitation circuit is configured to apply a sequence of differential voltages on one or more consecutive electrodes which moves the first droplet to the high displacement region.
    Type: Grant
    Filed: February 2, 2021
    Date of Patent: July 4, 2023
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Daniel Lee Revier, Benjamin Stassen Cook, David Patrick Magee, Stephen John Fedigan
  • Patent number: 11676930
    Abstract: In described examples, a microelectronic device includes a microelectronic die with a die attach surface. The microelectronic device further includes a nanoparticle layer coupled to the die attach surface. The nanoparticle layer may be in direct contact with the die attach surface, or may be coupled to the die attach surface through an intermediate layer, such as an adhesion layer or a contact metal layer. The nanoparticle layer includes nanoparticles having adjacent nanoparticles adhered to each other. The microelectronic die is attached to a package substrate by a die attach material. The die attach material extends into the nanoparticle layer and contacts at least a portion of the nanoparticles.
    Type: Grant
    Filed: May 7, 2021
    Date of Patent: June 13, 2023
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Benjamin Stassen Cook, Daniel Lee Revier, Sadia Naseem, Mahmud Halim Chowdhury
  • Patent number: 11607704
    Abstract: Methods and apparatus for electrostatic control of expelled material for lens cleaners are disclosed. In certain described examples, an apparatus can expel fluid by atomization from a central area of the surface using an ultrasonic transducer mechanically coupled to the surface. A first electrode can be arranged relative to the central area of the surface. A second electrode can be located in a peripheral area relative to the central area of the surface, in which a voltage can be applied between the first and second electrodes to attract atomized fluid at the peripheral area.
    Type: Grant
    Filed: April 20, 2017
    Date of Patent: March 21, 2023
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Benjamin Stassen Cook, Daniel Lee Revier, Stephen John Fedigan, David Patrick Magee
  • Patent number: 11487206
    Abstract: A microelectronic device is formed by dispensing discrete amounts of a mixture of photoresist resin and solvents from droplet-on-demand sites onto a wafer to form a first photoresist sublayer, while the wafer is at a first temperature which allows the photoresist resin to attain less than 10 percent thickness non-uniformity. The wafer moves under the droplet-on-demand sites in a first direction to form the first photoresist sublayer. A portion of the solvents in the first photoresist sublayer is removed. A second photoresist sublayer is formed on the first photoresist sublayer using the droplet-on-demand sites while the wafer is at a second temperature to attain less than 10 percent thickness non-uniformity in the combined first and second photoresist sublayers. The wafer moves under the droplet-on-demand sites in a second direction for the second photoresist sublayer, opposite from the first direction.
    Type: Grant
    Filed: December 30, 2019
    Date of Patent: November 1, 2022
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Daniel Lee Revier, Sean Ping Chang, Benjamin Stassen Cook, Scott Robert Summerfelt
  • Publication number: 20220336217
    Abstract: A microelectronic device is formed by forming at least a portion of a substrate of the microelectronic device by one or more additive processes. The additive processes may be used to form semiconductor material of the substrate. The additive processes may also be used to form dielectric material structures or electrically conductive structures, such as metal structures, of the substrate. The additive processes are used to form structures of the substrate which would be costly or impractical to form using planar processes. In one aspect, the substrate may include multiple doped semiconductor elements, such as wells or buried layers, having different average doping densities, or depths below a component surface of the substrate. In another aspect, the substrate may include dielectric isolation structures with semiconductor material extending at least partway over and under the dielectric isolation structures. Other structures of the substrate are disclosed.
    Type: Application
    Filed: June 23, 2022
    Publication date: October 20, 2022
    Inventors: Benjamin Stassen Cook, Daniel Lee Revier
  • Patent number: 11417540
    Abstract: In described examples, a method for encapsulating a semiconductor device includes the steps of immersing a layer of the semiconductor device in a liquid encapsulation material, irradiating portions of the liquid encapsulation material to polymerize the liquid encapsulation material, and moving the semiconductor device further from a surface of the liquid encapsulation material proximate to the layer. Immersing the semiconductor device is performed to cover a layer of the device in the liquid encapsulation material. Targeted locations of the liquid encapsulation material covering the layer are irradiated to form solid encapsulation material. The semiconductor device is moved from a surface of the liquid encapsulation material so that a new layer of the semiconductor device and/or of the solid encapsulation material can be covered by the liquid encapsulation material.
    Type: Grant
    Filed: December 7, 2020
    Date of Patent: August 16, 2022
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Benjamin Stassen Cook, Daniel Lee Revier
  • Patent number: 11404270
    Abstract: A microelectronic device is formed by forming at least a portion of a substrate of the microelectronic device by one or more additive processes. The additive processes may be used to form semiconductor material of the substrate. The additive processes may also be used to form dielectric material structures or electrically conductive structures, such as metal structures, of the substrate. The additive processes are used to form structures of the substrate which would be costly or impractical to form using planar processes. In one aspect, the substrate may include multiple doped semiconductor elements, such as wells or buried layers, having different average doping densities, or depths below a component surface of the substrate. In another aspect, the substrate may include dielectric isolation structures with semiconductor material extending at least partway over and under the dielectric isolation structures. Other structures of the substrate are disclosed.
    Type: Grant
    Filed: November 30, 2018
    Date of Patent: August 2, 2022
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Benjamin Stassen Cook, Daniel Lee Revier
  • Publication number: 20220208640
    Abstract: In described examples, a semiconductor wafer with a thermally conductive surface layer comprises a bulk semiconductor layer having a first surface and a second surface, circuitry on the first surface, a metallic layer attached to the first surface or the second surface, and a graphene layer attached to the metallic layer. The first surface opposes the second surface. The metallic layer comprises a transition metal.
    Type: Application
    Filed: December 30, 2020
    Publication date: June 30, 2022
    Inventors: Benjamin Stassen Cook, Nazila Dadvand, Archana Venugopal, Daniel Lee Revier
  • Patent number: 11355414
    Abstract: In described examples, a circuit (e.g., an integrated circuit) includes a semiconductor substrate that includes a frontside surface and a backside surface. A circuit element is included at the frontside surface. An optional electrical insulator layer can be included adjacent to the backside surface. A distributor layer is included adjacent to the backside surface. In some examples, the distributor layer includes a distributor material that includes a matrix of cohered nanoparticles and metallic particles embedded by the cohered nanoparticles.
    Type: Grant
    Filed: September 27, 2019
    Date of Patent: June 7, 2022
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Benjamin Stassen Cook, Nazila Dadvand, Daniel Lee Revier, Archana Venugopal
  • Patent number: 11271296
    Abstract: An antenna includes a metal member having a surface that includes a slot. The metal member includes a plurality of legs orthogonal to the surface of the metal member. The plurality of legs are configured to be attached to a circuit board. A first dielectric material is in the slot.
    Type: Grant
    Filed: November 6, 2018
    Date of Patent: March 8, 2022
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Leon Stiborek, Alexey Berd, Daniel Lee Revier
  • Publication number: 20210265299
    Abstract: In described examples, a microelectronic device includes a microelectronic die with a die attach surface. The microelectronic device further includes a nanoparticle layer coupled to the die attach surface. The nanoparticle layer may be in direct contact with the die attach surface, or may be coupled to the die attach surface through an intermediate layer, such as an adhesion layer or a contact metal layer. The nanoparticle layer includes nanoparticles having adjacent nanoparticles adhered to each other. The microelectronic die is attached to a package substrate by a die attach material. The die attach material extends into the nanoparticle layer and contacts at least a portion of the nanoparticles.
    Type: Application
    Filed: May 7, 2021
    Publication date: August 26, 2021
    Inventors: Benjamin Stassen Cook, Daniel Lee Revier, Sadia Naseem, Mahmud Halim Chowdhury
  • Publication number: 20210200094
    Abstract: A microelectronic device is formed by dispensing discrete amounts of a mixture of photoresist resin and solvents from droplet-on-demand sites onto a wafer to form a first photoresist sublayer, while the wafer is at a first temperature which allows the photoresist resin to attain less than 10 percent thickness non-uniformity. The wafer moves under the droplet-on-demand sites in a first direction to form the first photoresist sublayer. A portion of the solvents in the first photoresist sublayer is removed. A second photoresist sublayer is formed on the first photoresist sublayer using the droplet-on-demand sites while the wafer is at a second temperature to attain less than 10 percent thickness non-uniformity in the combined first and second photoresist sublayers. The wafer moves under the droplet-on-demand sites in a second direction for the second photoresist sublayer, opposite from the first direction.
    Type: Application
    Filed: December 30, 2019
    Publication date: July 1, 2021
    Applicant: Texas Instruments Incorporated
    Inventors: Daniel Lee Revier, Sean Ping Chang, Benjamin Stassen Cook, Scott Robert Summerfelt
  • Patent number: 11031364
    Abstract: In described examples, a microelectronic device includes a microelectronic die with a die attach surface. The microelectronic device further includes a nanoparticle layer coupled to the die attach surface. The nanoparticle layer may be in direct contact with the die attach surface, or may be coupled to the die attach surface through an intermediate layer, such as an adhesion layer or a contact metal layer. The nanoparticle layer includes nanoparticles having adjacent nanoparticles adhered to each other. The microelectronic die is attached to a package substrate by a die attach material. The die attach material extends into the nanoparticle layer and contacts at least a portion of the nanoparticles.
    Type: Grant
    Filed: March 7, 2018
    Date of Patent: June 8, 2021
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Benjamin Stassen Cook, Daniel Lee Revier, Sadia Naseem, Mahmud Halim Chowdhury