Abstract: A vehicle, and a balancing device and method of controlling a state of charge of a reference electrode in a battery. The balancing device includes a measurement circuit and a charging circuit. The measurement circuit is configured to obtain a measurement of a reference voltage of the reference electrode. The charging circuit is configured to adjust the reference voltage based on the measurement. The state of charge of the reference electrode is controlled based on the reference voltage.

Abstract: A vehicle, and a balancing device and method of controlling a state of charge of a reference electrode in a battery. The balancing device includes a measurement circuit and a charging circuit. The measurement circuit is configured to obtain a measurement of a reference voltage of the reference electrode. The charging circuit is configured to adjust the reference voltage based on the measurement. The state of charge of the reference electrode is controlled based on the reference voltage.

Abstract: A method for time interleaved writing includes providing a phase change material (PCM) array, the PCM array comprising a plurality of phase change material areas arranged in a two dimensional array having rows and columns, selecting PCM areas to configure, and configuring the selected PCM areas. Selecting PCM areas to configure includes selecting PCM areas to configure in both the row and column dimensions that are separated by at least two PCM areas that are not selected to be configured.

Abstract: A method for time interleaved writing includes providing a phase change material (PCM) array, the PCM array comprising a plurality of phase change material areas arranged in a two dimensional array having rows and columns, selecting PCM areas to configure, and configuring the selected PCM areas. Selecting PCM areas to configure includes selecting PCM areas to configure in both the row and column dimensions that are separated by at least two PCM areas that are not selected to be configured.

Abstract: A half bridge circuit including an isolation substrate, a metal layer on one surface of the isolation substrate, a power loop substrate on the metal layer, an upper switch on the power loop substrate, a lower switch on the power loop substrate and coupled to the upper switch, a capacitor on the power loop substrate and coupled to the upper switch, a first via through the power loop substrate and coupled between the lower switch and the metal layer, and a second via through the power loop substrate and coupled between the capacitor and the metal layer, wherein the power loop substrate has a height and separates the metal layer from the upper switch, lower switch and capacitor by the height.

Abstract: A half bridge circuit including an isolation substrate, a metal layer on one surface of the isolation substrate, a power loop substrate on the metal layer, an upper switch on the power loop substrate, a lower switch on the power loop substrate and coupled to the upper switch, a capacitor on the power loop substrate and coupled to the upper switch, a first via through the power loop substrate and coupled between the lower switch and the metal layer, and a second via through the power loop substrate and coupled between the capacitor and the metal layer, wherein the power loop substrate has a height and separates the metal layer from the upper switch, lower switch and capacitor by the height.

Abstract: Method and system for transmitting optical clock signals and quantum key signals on a single optical channel. A multi-photon optical clock signal is received at an electro-optic switch at a first clock rate. The electro-optic switch may be configured for an interval defined by a second clock rate for generating a single photon quantum key signal. The multi-photon optical clock signal and the single photon quantum key signal are combined such that the single optical channel transmits the single photon quantum key signal at a first interval and the multi-photon optical clock signal at a second interval. The quantum key signal is transmitted from a transmitter at a first timing, and detected by a detector at a receiver. An output signal of the detector is sampled at a second timing that is delayed relative to the first timing for reducing quantum bit error rate.

Abstract: A method and system for transmitting optical clock signals and quantum key signals on a single optical channel, and for reducing quantum bit error rate in a quantum key distribution system. The method includes receiving a multi-photon optical clock signal at an electro-optic switch at a first clock rate. The electro-optic switch may be configured for an interval defined by a second clock rate for generating a single photon quantum key signal. The multi-photon optical clock signal and the single photon quantum key signal may be combined such that the single optical channel transmits the single photon quantum key signal at a first interval and the multi-photon optical clock signal at a second interval. The quantum key signal may be transmitted from a transmitter at a first timing, and detected by a detector at a receiver. An output signal of the detector may be sampled at a second timing that is delayed relative to the first timing for reducing quantum bit error rate.