Patents by Inventor Daniel Ouellette

Daniel Ouellette has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250212548
    Abstract: Embodiments of the disclosure provide apparatuses, systems, and methods related to photonic devices. A method for fabricating photonic devices may include forming a mask layer on a surface of a mold layer. The mask layer may define one or more openings that expose one or more select portions of a surface of the mold layer. The method may include etching through the one or more openings to form one or more cavities within the mold layer and depositing photonic material within the one or more cavities. Depositing the photonic material may include overfilling the one or more cavities to form an over-filled layer on the mask layer. The method may include removing the over-filled layer and the hard mask layer.
    Type: Application
    Filed: December 19, 2024
    Publication date: June 26, 2025
    Inventors: Adam Jay Ollanik, Rezlind Bushati, Matthew Blain, Susan Eileen Shore, Amit Agrawal, Henri Lezec, Wenqi Zhu, Chris Langer, Daniel Ouellette
  • Patent number: 11770979
    Abstract: A memory device includes a bottom electrode, a conductive layer such as an alloy including ruthenium and tungsten above the bottom electrode and a perpendicular magnetic tunnel junction (pMTJ) on the conductive layer. In an embodiment, the pMTJ includes a fixed magnet, a tunnel barrier above the fixed magnet and a free magnet on the tunnel barrier. The memory device further includes a synthetic antiferromagnetic (SAF) structure that is ferromagnetically coupled with the fixed magnet to pin a magnetization of the fixed magnet. The conductive layer has a crystal texture which promotes high quality FCC <111> crystal texture in the SAF structure and improves perpendicular magnetic anisotropy of the fixed magnet.
    Type: Grant
    Filed: June 29, 2018
    Date of Patent: September 26, 2023
    Assignee: Intel Corporation
    Inventors: Daniel Ouellette, Justin Brockman, Tofizur Rahman, Angeline Smith, Andrew Smith, Christopher Wiegand, Oleg Golonzka
  • Patent number: 11737368
    Abstract: A memory device includes a first electrode, a conductive layer including iridium above the first electrode and a magnetic junction directly on the conductive layer. The magnetic junction further includes a pinning structure above the conductive layer, a fixed magnet above the pinning structure, a tunnel barrier on the fixed magnet, a free magnet on the tunnel barrier layer and a second electrode above the free magnet. The conductive layer including iridium and the pinning structure including iridium provide switching efficiency.
    Type: Grant
    Filed: March 27, 2019
    Date of Patent: August 22, 2023
    Assignee: Intel Corporation
    Inventors: Daniel Ouellette, Christopher Wiegand, Justin Brockman, Tofizur Rahman, Oleg Golonzka, Angeline Smith, Andrew Smith, James Pellegren, Michael Robinson, Huiying Liu
  • Patent number: 11411173
    Abstract: Material stacks for perpendicular spin transfer torque memory (pSTTM) devices, pSTTM devices and computing platforms employing such material stacks, and methods for forming them are discussed. The material stacks include a cladding layer of predominantly tungsten on a protective layer, which is in turn on an oxide capping layer over a magnetic junction stack. The cladding layer reduces oxygen dissociation from the oxide capping layer for improved thermal stability and retention.
    Type: Grant
    Filed: June 15, 2018
    Date of Patent: August 9, 2022
    Assignee: Intel Corporation
    Inventors: Angeline Smith, Justin Brockman, Tofizur Rahman, Daniel Ouellette, Andrew Smith, Juan Alzate Vinasco, James ODonnell, Christopher Wiegand, Oleg Golonzka
  • Patent number: 11380838
    Abstract: A memory device method of fabrication that includes a first electrode having a first conductive layer including titanium and nitrogen and a second conductive layer on the first conductive layer that includes tantalum and nitrogen. The memory device further includes a magnetic tunnel junction (MTJ) on the first electrode. In some embodiments, at least a portion of the first conductive layer proximal to an interface with the second conductive layer includes oxygen.
    Type: Grant
    Filed: June 29, 2018
    Date of Patent: July 5, 2022
    Assignee: Intel Corporation
    Inventors: Justin Brockman, Conor Puls, Stephen Wu, Christopher Wiegand, Tofizur Rahman, Daniel Ouellette, Angeline Smith, Andrew Smith, Pedro Quintero, Juan Alzate-Vinasco, Oleg Golonzka
  • Patent number: 11063088
    Abstract: A memory device includes a first electrode, a second electrode and a magnetic tunnel junction (MTJ) between the first electrode and the second electrode. The MTJ includes a fixed magnet, a free magnet and a tunnel barrier between the fixed magnet and the free magnet. The MTJ further includes a conductive layer between the free magnet and the second electrode, the conductive layer having a metallic dopant, where the metallic dopant has a concentration that increase with distance from an interface between the free magnet and the conductive layer. A capping layer is between the conductive layer and the second electrode.
    Type: Grant
    Filed: December 6, 2019
    Date of Patent: July 13, 2021
    Assignee: Intel Corporation
    Inventors: Daniel Ouellette, Christopher Wiegand, Justin Brockman, Tofizur Rahman, Oleg Golonzka, Angeline Smith, Andrew Smith, James Pellegren, Aaron Littlejohn, Juan G. Alzate-Vinasco, Yu-Jin Chen, Tanmoy Pramanik
  • Publication number: 20210175284
    Abstract: A memory device includes a first electrode, a second electrode and a magnetic tunnel junction (MTJ) between the first electrode and the second electrode. The MTJ includes a fixed magnet, a free magnet and a tunnel barrier between the fixed magnet and the free magnet. The MTJ further includes a conductive layer between the free magnet and the second electrode, the conductive layer having a metallic dopant, where the metallic dopant has a concentration that increase with distance from an interface between the free magnet and the conductive layer. A capping layer is between the conductive layer and the second electrode.
    Type: Application
    Filed: December 6, 2019
    Publication date: June 10, 2021
    Applicant: Intel Corporation
    Inventors: Daniel Ouellette, Christopher Wiegand, Justin Brockman, Tofizur Rahman, Oleg Golonzka, Angeline Smith, Andrew Smith, James Pellegren, Aaron Littlejohn, Juan G. Alzate-Vinasco, Yu-Jin Chen, Tanmoy Pramanik
  • Patent number: 10943950
    Abstract: A memory device includes a first electrode, a conductive layer including iridium above the first electrode, a magnetic junction on the conductive layer and a second electrode above the magnetic junction. The magnetic junction includes a magnetic structure including a first magnetic layer including cobalt, a non-magnetic layer including platinum or tungsten on the first magnetic layer and a second magnetic layer including cobalt on the non-magnetic layer. The magnetic junction further includes an anti-ferromagnetic layer on the magnet structure, a fixed magnet above the anti-ferromagnetic layer, a free magnet above the fixed magnet and a tunnel barrier between the fixed magnet and the free magnet.
    Type: Grant
    Filed: March 27, 2019
    Date of Patent: March 9, 2021
    Assignee: Intel Corporation
    Inventors: Daniel Ouellette, Christopher Wiegand, Justin Brockman, Tofizur Rahman, Oleg Golonzka, Angeline Smith, Andrew Smith, James Pellegren, Aaron Littlejohn, Michael Robinson, Huiying Liu
  • Publication number: 20200312907
    Abstract: A memory device includes a first electrode, a conductive layer including iridium above the first electrode, a magnetic junction on the conductive layer and a second electrode above the magnetic junction. The magnetic junction includes a magnetic structure including a first magnetic layer including cobalt, a non-magnetic layer including platinum or tungsten on the first magnetic layer and a second magnetic layer including cobalt on the non-magnetic layer. The magnetic junction further includes an anti-ferromagnetic layer on the magnet structure, a fixed magnet above the anti-ferromagnetic layer, a free magnet above the fixed magnet and a tunnel barrier between the fixed magnet and the free magnet.
    Type: Application
    Filed: March 27, 2019
    Publication date: October 1, 2020
    Applicant: Intel Corporation
    Inventors: Daniel Ouellette, Christopher Wiegand, Justin Brockman, Tofizur Rahman, Oleg Golonzka, Angeline Smith, Andrew Smith, James Pellegren, Aaron Littlejohn, Michael Robinson, Huiying Liu
  • Publication number: 20200313084
    Abstract: A memory device includes a first electrode, a conductive layer including iridium above the first electrode and a magnetic junction directly on the conductive layer. The magnetic junction further includes a pinning structure above the conductive layer, a fixed magnet above the pinning structure, a tunnel barrier on the fixed magnet, a free magnet on the tunnel barrier layer and a second electrode above the free magnet. The conductive layer including iridium and the pinning structure including iridium provide switching efficiency.
    Type: Application
    Filed: March 27, 2019
    Publication date: October 1, 2020
    Applicant: Intel Corporation
    Inventors: Daniel Ouellette, Christopher Wiegand, Justin Brockman, Tofizur Rahman, Oleg Golonzka, Angeline Smith, Andrew Smith, James Pellegren, Michael Robinson, Huiying Liu
  • Publication number: 20200313074
    Abstract: A memory device includes a first electrode, a second electrode and a magnetic junction between the first and the second electrode. The magnetic junction includes a first magnetic structure that includes a first magnet including an alloy of cobalt and tungsten, and a second magnet above the first magnet. The first and the second magnets are separated by a non-magnetic spacer layer. The magnetic junction further includes a layer including a metal and oxygen on the first magnetic structure. The tunnel barrier layer has an <001> crystal texture. The magnetic junction further includes a third magnet on the tunnel barrier layer. The third magnet has a magnetization which can change in response to torque from a current tunneling through the tunnel barrier layer.
    Type: Application
    Filed: March 27, 2019
    Publication date: October 1, 2020
    Applicant: Intel Corporation
    Inventors: Angeline Smith, Daniel Ouellette, Christopher Wiegand, Justin Brockman, Tofizur Rahman, Oleg Golonzka, Andrew Smith, James Pellegren
  • Publication number: 20200006634
    Abstract: A memory device method of fabrication that includes a first electrode having a first conductive layer including titanium and nitrogen and a second conductive layer on the first conductive layer that includes tantalum and nitrogen. The memory device further includes a magnetic tunnel junction (MTJ) on the first electrode. In some embodiments, at least a portion of the first conductive layer proximal to an interface with the second conductive layer includes oxygen.
    Type: Application
    Filed: June 29, 2018
    Publication date: January 2, 2020
    Applicant: Intel Corporation
    Inventors: Justin Brockman, Conor Puls, Stephen Wu, Christopher Wiegand, Tofizur Rahman, Daniel Ouellette, Angeline Smith, Andrew Smith, Pedro Quintero, Juan Alzate-Vinasco, Oleg Golonzka
  • Publication number: 20200006632
    Abstract: A memory device includes a bottom electrode, a conductive layer such as an alloy including ruthenium and tungsten above the bottom electrode and a perpendicular magnetic tunnel junction (pMTJ) on the conductive layer. In an embodiment, the pMTJ includes a fixed magnet, a tunnel barrier above the fixed magnet and a free magnet on the tunnel barrier. The memory device further includes a synthetic antiferromagnetic (SAF) structure that is ferromagnetically coupled with the fixed magnet to pin a magnetization of the fixed magnet. The conductive layer has a crystal texture which promotes high quality FCC <111> crystal texture in the SAF structure and improves perpendicular magnetic anisotropy of the fixed magnet.
    Type: Application
    Filed: June 29, 2018
    Publication date: January 2, 2020
    Applicant: Intel Corporation
    Inventors: Daniel Ouellette, Justin Brockman, Tofizur Rahman, Angeline Smith, Andrew Smith, Christopher Wiegand, Oleg Golonzka
  • Publication number: 20190386209
    Abstract: Material stacks for perpendicular spin transfer torque memory (pSTTM) devices, pSTTM devices and computing platforms employing such material stacks, and methods for forming them are discussed. The material stacks include a cladding layer of predominantly tungsten on a protective layer, which is in turn on an oxide capping layer over a magnetic junction stack. The cladding layer reduces oxygen dissociation from the oxide capping layer for improved thermal stability and retention.
    Type: Application
    Filed: June 15, 2018
    Publication date: December 19, 2019
    Applicant: Intel Corporation
    Inventors: Angeline Smith, Justin Brockman, Tofizur Rahman, Daniel Ouellette, Andrew Smith, Juan Alzate Vinasco, James ODonnell, Christopher Wiegand, Oleg Golonzka
  • Publication number: 20100029022
    Abstract: In a method for producing semiconductor components, in which chips are structured, tested, and isolated into dies on a wafer, in the event of a wafer being broken during the method, undamaged chips of a fragment of the wafer delimited by at least one edge section and at least one fracture contour are processed further as usual. The method has the result that the yield of usable chips is significantly increased in relation to the discarding and disposal of broken wafers provided in the prior art. The average production costs of electronic components and the loss of valuable semiconductor materials and the costs for the disposal of the fragments viewed as discards up to this point are thus significantly reduced.
    Type: Application
    Filed: February 4, 2008
    Publication date: February 4, 2010
    Applicant: SUSS MicroTec Test Systems GmbH
    Inventors: Frank FEHRMANN, Juliane Busch, Volker Hansel, Daniel Ouellette, Stojan Kanev
  • Patent number: 6883177
    Abstract: The portable kneepad is comprised of a cushion that has a knee-shaped indentation designed to comfortably support a user's knee. On the bottom side of the cushion is a magnet that allows the kneepad to hand from a metal surface when not in use and a handle means on the outer part of the cushion which allows the kneepad to be carried to various locations for its use. A gripping tread on the bottom side of the kneepad prevents the kneepad from moving or sliding when in use. The cushion is either made of rubber or polyurethane and/or has a waterproof and oil-resistant cover and allows automobile mechanics to use the kneepad to comfortably kneel while loading an automobile lift and to store the kneepad out of the way when not in use.
    Type: Grant
    Filed: May 13, 2002
    Date of Patent: April 26, 2005
    Inventors: Daniel Ouellette, Richard Ricci
  • Patent number: 6556141
    Abstract: An apparatus for flameout detection to be used with a furnace having a sight hole tube for inspection of a flame. The apparatus comprises a fixed portion adapted for being mounted to the sight hole tube and being electrically connected to a control system. The fixed portion defines a first see-through channel being positioned opposite a sight hole of the sight hole tube, whereby the flame is visible therethrough. A detachable portion has a sensor device disposed therein a second see-through channel. The detachable portion is releasably mounted to the fixed portion such as to engage a contact connection therewith. The sensor device is disposed opposite the first see-through channel of the fixed portion for flameout detection therethrough, wherein the detachable portion is electrically disconnected upon being detached from the fixed portion.
    Type: Grant
    Filed: May 14, 2001
    Date of Patent: April 29, 2003
    Assignee: PIA Procédé Industriel Automatisé Inc.
    Inventors: Daniel Ouellette, Roland Fabry
  • Patent number: 5581243
    Abstract: A phantom keyboard is formed on a touch sensitive display as an input tool for a computer. The keyboard is superimposed on, though does not occlude from view, an image of an output of an application being run on the computer. In a another aspect of the invention, the simulated keyboard is displayed in a different fashion, in a window occupying, e.g., the bottom of the display rastor, while the application's output appears in a window occupying, e.g., the top of the display rastor. Since this arrangement provides only a fraction of the full rastor for displaying the output from the application program, a special scroll feature is provided. This feature permits the user to scroll through the full screen page of text, but without the text of any other screen pages appearing on the display. In yet another aspect of the invention, the key "auto-repeat delay" and "auto repeat rate" of the simulated keyboard are user adjustable, again preferably by an adjust appearing on the touch-sensitive display.
    Type: Grant
    Filed: June 4, 1990
    Date of Patent: December 3, 1996
    Assignee: Microslate Inc.
    Inventors: Daniel Ouellette, Sylvain D'Auteuil
  • Patent number: D336464
    Type: Grant
    Filed: November 5, 1990
    Date of Patent: June 15, 1993
    Assignee: MicroSlate, Inc.
    Inventors: William Clough, Daniel Ouellette