Patents by Inventor Daniel PASCUAL
Daniel PASCUAL has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11651942Abstract: An atmospheric pressure plasma system includes an atmospheric pressure plasma source that generates a glow discharge-type plasma. The atmospheric pressure plasma source comprises a plasma head and a gas sensor system. The plasma head includes a gas inlet, a gas passage surrounded by a dielectric liner, a radio frequency (RF) electrode and a ground electrode. The RF electrode and the ground electrode are arranged at opposite sides of an outer surface of a segment of the gas passage. The gas sensor system comprises a first pellistor that is exposed to a process gas entering the gas inlet and provides real-time monitoring of the presence and concentration of helium in the process gas entering the gas inlet during plasma operation.Type: GrantFiled: December 11, 2020Date of Patent: May 16, 2023Assignee: Ontos Equipment Systems, Inc.Inventors: Robert Emmett Hughlett, Daniel Pascual, David Meyer, Michael Dow Stead
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Publication number: 20210193442Abstract: An atmospheric pressure plasma system includes an atmospheric pressure plasma source that generates a glow discharge-type plasma. The atmospheric pressure plasma source comprises a plasma head and a gas sensor system. The plasma head includes a gas inlet, a gas passage surrounded by a dielectric liner, a radio frequency (RF) electrode and a ground electrode. The RF electrode and the ground electrode are arranged at opposite sides of an outer surface of a segment of the gas passage. The gas sensor system comprises a first pellistor that is exposed to a process gas entering the gas inlet and provides real-time monitoring of the presence and concentration of helium in the process gas entering the gas inlet during plasma operation.Type: ApplicationFiled: December 11, 2020Publication date: June 24, 2021Applicant: Ontos Equipment Systems, Inc.Inventors: ROBERT EMMETT HUGHLETT, DANIEL PASCUAL, DAVID MEYER, MICHAEL DOW STEAD
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Patent number: 10976491Abstract: In one embodiment an optoelectronic system can include a photonics interposer having a substrate and a functional interposer structure formed on the substrate, a plurality of through vias carrying electrical signals extending through the substrate and the functional interposer structure, and a plurality of wires carrying signals to different areas of the functional interposer structure. The system can further include one or more photonics device integrally formed in the functional interposer structure, and one or more prefabricated component attached to the functional interposer structure.Type: GrantFiled: October 27, 2017Date of Patent: April 13, 2021Assignees: THE RESEARCH FOUNDATION FOR THE STATE UNIVERSITY OF NEW YORK, THE TRUSTEES OF COLUMBIA UNIVERSITY IN THE CITY OF NEW YORK, ANALOG PHOTONICS, LLC, ARIZONA BOARD OF REGENTS ON BEHALF OF THE UNIVERSITY OF ARIZONAInventors: Douglas Coolbaugh, Michael Watts, Michal Lipson, Keren Bergman, Thomas Koch, Jeremiah Hebding, Daniel Pascual, Douglas La Tulipe
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Publication number: 20180143374Abstract: In one embodiment an optoelectronic system can include a photonics interposer having a substrate and a functional interposer structure formed on the substrate, a plurality of through vias carrying electrical signals extending through the substrate and the functional interposer structure, and a plurality of wires carrying signals to different areas of the functional interposer structure. The system can further include one or more photonics device integrally formed in the functional interposer structure, and one or more prefabricated component attached to the functional interposer structure.Type: ApplicationFiled: October 27, 2017Publication date: May 24, 2018Inventors: Douglas COOLBAUGH, Michael WATTS, Michal LIPSON, Keren BERGMAN, Thomas KOCH, Jeremiah HEBDING, Daniel PASCUAL, Douglas LA TULIPE
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Patent number: 8969200Abstract: An apparatus and method are provided for integrating TSVs into devices prior to device contacts processing. The apparatus includes a semiconducting layer; one or more CMOS devices mounted on a top surface of the semiconducting layer; one or more TSVs integrated into the semiconducting layer of the device wafer; at least one metal layer applied over the TSVs; and one or more bond pads mounted onto a top layer of the at least one metal layer, wherein the at least one metal layer is arranged to enable placement of the one or more bond pads at a specified location for bonding to a second device wafer. The method includes obtaining a wafer of semiconducting material, performing front end of line processing on the wafer; providing one or more TSVs in the wafer; performing middle of line processing on the wafer; and performing back end of line processing on the wafer.Type: GrantFiled: April 12, 2012Date of Patent: March 3, 2015Assignee: The Research Foundation of State University of New YorkInventors: Jeremiah Hebding, Megha Rao, Colin McDonough, Matthew Smalley, Douglas Duane Coolbaugh, Joseph Piccirillo, Jr., Stephen G. Bennett, Michael Liehr, Daniel Pascual
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Patent number: 8697542Abstract: A method is provided for bonding a die to a base technology wafer and includes: providing a device wafer having a front, back, at least one side, and at least one TSV, wherein the back contains a substrate material; providing a carrier wafer having a front, back, and at least one side; bonding the wafers using an adhesive; removing the substrate material and wet etching, from the device wafer's back side, to expose at least one metallization scheme feature; processing the device wafer's back side to create at least one backside redistribution layer; removing the device wafer from the carrier wafer; dicing the device wafer into individual die; providing a base technology wafer; coating the front of the base technology wafer with a sacrificial adhesive; placing the front of the individual die onto the front of the base technology wafer; and bonding the individual die to the base technology wafer.Type: GrantFiled: April 12, 2012Date of Patent: April 15, 2014Assignee: The Research Foundation of State University of New YorkInventors: Daniel Pascual, Jeremiah Hebding, Megha Rao, Colin McDonough, Douglas Duane Coolbaugh, Joseph Piccirillo, Jr., Michael Liehr
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Publication number: 20130273691Abstract: A method is provided for bonding a die to a base technology wafer and includes: providing a device wafer having a front, back, at least one side, and at least one TSV, wherein the back contains a substrate material; providing a carrier wafer having a front, back, and at least one side; bonding the wafers using an adhesive; removing the substrate material and wet etching, from the device wafer's back side, to expose at least one metallization scheme feature; processing the device wafer's back side to create at least one backside redistribution layer; removing the device wafer from the carrier wafer; dicing the device wafer into individual die; providing a base technology wafer; coating the front of the base technology wafer with a sacrificial adhesive; placing the front of the individual die onto the front of the base technology wafer; and bonding the individual die to the base technology wafer.Type: ApplicationFiled: April 12, 2012Publication date: October 17, 2013Applicant: THE RESEARCH FOUNDATION OF STATE UNIVERSITY OF NEW YORKInventors: Daniel PASCUAL, Jeremiah HEBDING, Megha RAO, Colin McDONOUGH, Douglas Duane COOLBAUGH, Joseph PICCIRILLO, JR., Michael LIEHR
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Publication number: 20130270711Abstract: An apparatus and method are provided for integrating TSVs into devices prior to device contacts processing. The apparatus includes a semiconducting layer; one or more CMOS devices mounted on a top surface of the semiconducting layer; one or more TSVs integrated into the semiconducting layer of the device wafer; at least one metal layer applied over the TSVs; and one or more bond pads mounted onto a top layer of the at least one metal layer, wherein the at least one metal layer is arranged to enable placement of the one or more bond pads at a specified location for bonding to a second device wafer. The method includes obtaining a wafer of semiconducting material, performing front end of line processing on the wafer; providing one or more TSVs in the wafer; performing middle of line processing on the wafer; and performing back end of line processing on the wafer.Type: ApplicationFiled: April 12, 2012Publication date: October 17, 2013Applicant: The Research Foundation Of State University Of New YorkInventors: Jeremiah HEBDING, Megha RAO, Colin McDONOUGH, Matthew SMALLEY, Douglas Duane COOLBAUGH, Joseph PICCIRILLO, JR., Stephen G. BENNETT, Michael LIEHR, Daniel PASCUAL
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Patent number: 8460791Abstract: The present invention concerns microcapsules comprising a capsule core and a capsule wall composed of thermoset polymer and also, disposed on the outer surface of the capsule wall, a polyelectrolyte having an average molecular weight in the range from 500 g/mol to 10 million g/mol, and also a process for their production and their use in bindered building materials, textiles, heat transfer fluids and dumped beds.Type: GrantFiled: July 5, 2007Date of Patent: June 11, 2013Assignee: BASF AktiengesellschaftInventors: Hans-Peter Hentze, Dieter Niederberger, Hans Willax, Joachim Burger, Daniel Pascual Gienap
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Publication number: 20090256107Abstract: The present invention concerns microcapsules comprising a capsule core and a capsule wall composed of thermoset polymer and also, disposed on the outer surface of the capsule wall, a polyelectrolyte having an average molecular weight in the range from 500 g/mol to 10 million g/mol, and also a process for their production and their use in bindered building materials, textiles, heat transfer fluids and dumped beds.Type: ApplicationFiled: July 5, 2007Publication date: October 15, 2009Applicant: BASF SF.Inventors: Hans-Peter Hentze, Dieter Niederberger, Hans Willax, Joachim Burger, Daniel Pascual Gienap