Abstract: In one example, a device includes at least one processor, a transceiver configured to send and receive data, and at least one memory device. The at least one memory device includes a range of physical memory addresses divided into a plurality of physical memory partitions that each includes a sub-range of the range of physical memory addresses and corresponds to a range of virtual memory addresses. Instructions encoded in the at least one memory device cause the at least one processor to receive a memory address request configured to request access to a requested physical memory address within the range of physical memory addresses, determine that the requested physical memory address is associated with one of the plurality of physical memory partitions, determine a virtual memory address corresponding to the requested physical memory address, and access the requested physical memory address via the determined virtual memory address.