Patents by Inventor Daniel Queyssac

Daniel Queyssac has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5161304
    Abstract: An integrated circuit package encapsulates a volatile memory chip and a backup battery for preserving data in the event of loss of main power supply. The package includes a finger lead assembly encapsulated within a body of non-conductive material, with a central base support finger lead being offset within an interconnect region. One terminal of the battery is welded to the offset base finger lead, and the integrated circuit chip is bonded directly onto the other battery terminal by a layer of conductive epoxy. The stacked assembly of the integrated circuit chip, the battery and the offset base finger lead is centered longitudinally and vertically within the interconnect region whereby the stacked assembly, including gold interconnect wires, are completely encapsulated within the molded package body, without increasing the standoff height of the package.
    Type: Grant
    Filed: August 1, 1991
    Date of Patent: November 10, 1992
    Assignee: SGS-Thomson Microelectronics, Inc.
    Inventors: Daniel Queyssac, Richard K. Robinson, Kimi S. Husse
  • Patent number: 5089877
    Abstract: An integrated circuit package encapsulates a volatile memory chip and a backup battery for preserving data in the event of loss of main power supply. The package includes a finger lead assembly encapsulated within a body of non-conductive material, with a central base support finger lead being offset within an interconnect region. One terminal of the battery is welded to the offset base finger lead, and the integrated circuit chip is bonded directly onto the other battery terminals by a layer of conductive epoxy. The stacked assembly of the integrated circuit chip, the battery and the offset base finger lead is centered longitudinally and vertically within the interconnect region whereby the stacked assembly, including gold interconnect wires, are completely encapsulated within the molded package body, without increasing the standoff height of the package.
    Type: Grant
    Filed: June 6, 1990
    Date of Patent: February 18, 1992
    Assignee: SGS-Thomson Microelectronics, Inc.
    Inventors: Daniel Queyssac, Richard K. Robinson, Kimi S. Husse
  • Patent number: 5008776
    Abstract: An integrated circuit package encapsulates a volatile memory chip and a backup battery for preserving data in the event of loss of main power supply. The package includes a finger lead assembly encapsulated within a body of non-conductive material, with a coplanar base support finger lead traversing an interconnect region. One terminal of the battery is welded to the base support finger lead, and the integrated circuit chip is bonded directly onto the other battery terminal by a layer of conductive epoxy. The stacked assembly of the integrated circuit chip, the battery and the base support finger lead is disposed within a central region whereby the stacked assembly, including gold interconnect wires, are completely encapsulated within the molded package body.
    Type: Grant
    Filed: June 6, 1990
    Date of Patent: April 16, 1991
    Assignee: SGS-Thomson Microelectronics, Inc.
    Inventor: Daniel Queyssac