Patents by Inventor Daniel Quist

Daniel Quist has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Network topology mapper
    Patent number: 7319677
    Abstract: A method enables the topology of an acyclic fully propagated network to be discovered. A list of switches that comprise the network is formed and the MAC address cache for each one of the switches is determined. For each pair of switches, from the MAC address caches the remaining switches that see the pair of switches are located. For each pair of switches the remaining switches are determined that see one of the pair of switches on a first port and the second one of the pair of switches on a second port. A list of insiders is formed for every pair of switches. It is determined whether the insider for each pair of switches is a graph edge and adjacent ones of the graph edges are determined. A symmetric adjacency matrix is formed from the graph edges to represent the topology of the data link network.
    Type: Grant
    Filed: December 17, 2004
    Date of Patent: January 15, 2008
    Assignee: Los Alamos National Security, LLC
    Inventors: Daniel A. Quist, Eugene M. Gavrilov, Michael E. Fisk
  • Network topology mapper
    Publication number: 20060133297
    Abstract: A method enables the topology of an acyclic fully propagated network to be discovered. A list of switches that comprise the network is formed and the MAC address cache for each one of the switches is determined. For each pair of switches, from the MAC address caches the remaining switches that see the pair of switches are located. For each pair of switches the remaining switches are determined that see one of the pair of switches on a first port and the second one of the pair of switches on a second port. A list of insiders is formed for every pair of switches. It is determined whether the insider for each pair of switches is a graph edge and adjacent ones of the graph edges are determined. A symmetric adjacency matrix is formed from the graph edges to represent the topology of the data link network.
    Type: Application
    Filed: December 17, 2004
    Publication date: June 22, 2006
    Inventors: Daniel Quist, Eugene Gavrilov, Michael Fisk