Abstract: A digital-to-analog converter (DAC) includes a first DAC core, a second DAC core, and a butterfly switch. The first DAC core generates a first output. The second DAC core generates a second output. The butterfly switch includes at least one of switch transistors and cascode transistors. The butterfly switch selectively connects the first output and the second output to an output stage of the DAC.

Abstract: A digital-to-analog converter (DAC) includes a first DAC core, a second DAC core, and a butterfly switch. The first DAC core generates a first output. The second DAC core generates a second output. The butterfly switch includes at least one of switch transistors and cascode transistors. The butterfly switch selectively connects the first output and the second output to an output stage of the DAC.

Abstract: In an embodiment, a current source having a piece-wise linear relationship between current and temperature is provided. The current source includes a first current source to provide current based on a first current-temperature relationship. The current source further includes a second current source coupled in parallel to the first current source. The second current source is to provide current based on a second current-temperature relationship. The current source further includes first mirroring circuitry to mirror a sum of the first current source and the second current source to an output current source. The current source also includes second mirroring circuitry to mirror the sum of the first current source and the second current source for comparison with a third current source. The third current source provides a minimum current magnitude and the third current source is coupled to the second current source to control output of the second current source.

Abstract: A method for providing dynamic element matching of capacitors in a pipelined analog to digital converter (ADC). Instead of randomizing the output of a flash ADC before providing the output of the ADC to the capacitor array, the threshold voltages from a reference ladder are randomized. This eliminates multiple, series connected switches of a randomizer between the output of a comparator bank and the capacitor array, and may be done during the time the output of the comparator bank of the flash ADC is latched, thereby not negatively impacting the speed of operation of the pipelined ADC.

Abstract: A method for providing dynamic element matching of capacitors in a pipelined analog to digital converter (ADC). Instead of randomizing the output of a flash ADC before providing the output of the ADC to the capacitor array, the threshold voltages from a reference ladder are randomized. This eliminates multiple, series connected switches of a randomizer between the output of a comparator bank and the capacitor array, and may be done during the time the output of the comparator bank of the flash ADC is latched, thereby not negatively impacting the speed of operation of the pipelined ADC.

Abstract: A frequency synthesizer loop includes a first voltage controlled oscillator and a first divider circuit for dividing a frequency of an output signal generated by the first voltage controlled oscillator by a factor of N. The synthesizer loop further includes a phase/frequency detector circuit, a loop filter circuit, a summing circuit, a feedforward amplifier, a second voltage controlled oscillator, and a second divider circuit, wherein the second divider circuit divides a frequency of a second output signal generated by the second voltage controlled oscillator by a factor of M. The synthesizer loop also includes a microprocessor for varying the value M in response to a voltage input, such that the microprocessor varies the value of M to keep the first voltage in the middle of a range of the second voltage controlled oscillator.