Abstract: An exemplary semiconductor technology implemented microwave filter includes a dielectric substrate with metal traces on one surface that function as frequency selective circuits and reference ground. A top enclosure encloses the substrate have respective interior recesses with deposited continuous metal coatings. A plurality of metal bonding bumps or bonding wall extends outwardly from the projecting walls of the bottom and top enclosures. The bonding bumps on the top enclosure engage reference ground metal traces on respective surface of the substrate. As a result of applied pressure, the bonding bumps and respective reference ground metal traces together with the through-substrate vias form a metal-to-metal singly-connected ground reference structure for the entire circuitry.

Abstract: An exemplary semiconductor technology implemented microwave filter includes a dielectric substrate with metal traces on one surface that function as frequency selective circuits and reference ground. A top enclosure encloses the substrate have respective interior recesses with deposited continuous metal coatings. A plurality of metal bonding bumps or bonding wall extends outwardly from the projecting walls of the bottom and top enclosures. The bonding bumps on the top enclosure engage reference ground metal traces on respective surface of the substrate. As a result of applied pressure, the bonding bumps and respective reference ground metal traces together with the through-substrate vias form a metal-to-metal singly-connected ground reference structure for the entire circuitry.

Abstract: An exemplary semiconductor technology implemented microwave filter includes a dielectric substrate with metal traces on one surface that function as frequency selective circuits and reference ground. Other metal traces on the other surface of the substrate also provide reference ground. Bottom and top enclosures that enclose the substrate have respective interior recesses with deposited continuous metal coatings. A plurality of metal bonding bumps or bonding wall extends outwardly from the projecting walls of the bottom and top enclosures. The bonding bumps on the bottom and top enclosures engage reference ground metal traces on respective surfaces of the substrate. As a result of applied pressure, the bonding bumps and respective reference ground metal traces together with the through-substrate vias form a metal-to-metal singly-connected ground reference structure for the entire circuitry.

Abstract: An exemplary semiconductor technology implemented microwave filter includes a dielectric substrate with metal traces on one surface that function as frequency selective circuits and reference ground. Other metal traces on the other surface of the substrate also provide reference ground. Bottom and top enclosures that enclose the substrate have respective interior recesses with deposited continuous metal coatings. A plurality of metal bonding bumps or bonding wall extends outwardly from the projecting walls of the bottom and top enclosures. The bonding bumps on the bottom and top enclosures engage reference ground metal traces on respective surfaces of the substrate. As a result of applied pressure, the bonding bumps and respective reference ground metal traces together with the through-substrate vias form a metal-to-metal singly-connected ground reference structure for the entire circuitry.

Abstract: A method of manufacturing electronics using a nanoparticle ink printing method includes: synthesizing a phase change material (PCM) ink composition using hot injection to develop nanoparticles of the PCM; suspending the nanoparticles with a solvent; and printing a reconfigurable component using the PCM ink composition in additive manufacturing. Electronics includes: a substrate layer; an insulator layer printed on top of the substrate layer; a heater layer printed on top of the insulator layer; a barrier layer printed on top of one or more of the insulator layer and the heater layer; a phase change material (PCM) printed on top of the barrier layer; a connectivity layer printed on top of the PCM; and a passivation layer printed on top of one or more of the PCM and the connectivity layer.

Abstract: A method of manufacturing electronics using a nanoparticle ink printing method includes: synthesizing a phase change material (PCM) ink composition using hot injection to develop nanoparticles of the PCM; suspending the nanoparticles with a solvent; and printing a reconfigurable component using the PCM ink composition in additive manufacturing. Electronics includes: a substrate layer; an insulator layer printed on top of the substrate layer; a heater layer printed on top of the insulator layer; a barrier layer printed on top of one or more of the insulator layer and the heater layer; a phase change material (PCM) printed on top of the barrier layer; a connectivity layer printed on top of the PCM; and a passivation layer printed on top of one or more of the PCM and the connectivity layer.

Abstract: A RF amplifier circuit including a plurality of FET devices, where a source terminal of an FET device is electrically coupled to the drain terminal of another FET device. The circuit further includes a voltage divider network and a plurality of operational amplifiers, where a separate one of the operational amplifiers is provided for each FET device. Each operational amplifier includes a positive input terminal, a negative input terminal and an output terminal, where the output terminal for a particular operational amplifier is electrically coupled to a gate terminal of a particular FET device, the negative input terminal of each operational amplifier is electrically coupled to the source terminal of the particular FET device and the positive input terminal of each operational amplifier is electrically coupled to the voltage divider network. A source resistor is electrically coupled to the source terminal of a bottom FET device in the stack.

Abstract: A RF amplifier circuit including a plurality of FET devices, where a source terminal of an FET device is electrically coupled to the drain terminal of another FET device. The circuit further includes a voltage divider network and a plurality of operational amplifiers, where a separate one of the operational amplifiers is provided for each FET device. Each operational amplifier includes a positive input terminal, a negative input terminal and an output terminal, where the output terminal for a particular operational amplifier is electrically coupled to a gate terminal of a particular FET device, the negative input terminal of each operational amplifier is electrically coupled to the source terminal of the particular FET device and the positive input terminal of each operational amplifier is electrically coupled to the voltage divider network. A source resistor is electrically coupled to the source terminal of a bottom FET device in the stack.

Abstract: A resistive level-shifting biasing network is used with a capacitor in parallel to couple FET-based amplifier stages from DC to several GHz in a multi-stage amplifier. The output of the first amplifier stage is connected to the input of the second amplifier stage without a blocking capacitor or level-shifting diodes, allowing a portion of the drain current for the first amplifier stage to be supplied from the second amplifier stage. In a particular embodiment, a distributed amplifier achieved over 20 dB gain from DC to about 80 GHz using three traveling wave amplifier chips.