Patents by Inventor Daniel R. Schuette

Daniel R. Schuette has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11372119
    Abstract: A chip-to-chip integration process for rapid prototyping of silicon avalanche photodiode (APD) arrays has been developed. This process has several advantages over wafer-level 3D integration, including: (1) reduced cost per development cycle since a dedicated full-wafer read-out integrated circuit (ROIC) fabrication is not needed, (2) compatibility with ROICs made in previous fabrication runs, and (3) accelerated schedule. The process provides several advantages over previous processes for chip-to-chip integration, including: (1) shorter processing time as the chips can be diced, bump-bonded, and then thinned at the chip-level faster than in a wafer-level back-illumination process, and (2) the CMOS substrate provides mechanical support for the APD device, allowing integration of fast microlenses directly on the APD back surface. This approach yields APDs with low dark count rates (DCRs) and higher radiation tolerance for harsh environments and can be extended to large arrays of APDs.
    Type: Grant
    Filed: January 31, 2020
    Date of Patent: June 28, 2022
    Assignee: Massachusetts Institute of Technology
    Inventors: Brian F. Aull, Joseph S. Ciampi, Renee D. Lambert, Christopher Leitz, Karl Alexander McIntosh, Steven Rabe, Kevin Ryu, Daniel R. Schuette, David Volfson
  • Publication number: 20200319355
    Abstract: A chip-to-chip integration process for rapid prototyping of silicon avalanche photodiode (APD) arrays has been developed. This process has several advantages over wafer-level 3D integration, including: (1) reduced cost per development cycle since a dedicated full-wafer read-out integrated circuit (ROIC) fabrication is not needed, (2) compatibility with ROICs made in previous fabrication runs, and (3) accelerated schedule. The process provides several advantages over previous processes for chip-to-chip integration, including: (1) shorter processing time as the chips can be diced, bump-bonded, and then thinned at the chip-level faster than in a wafer-level back-illumination process, and (2) the CMOS substrate provides mechanical support for the APD device, allowing integration of fast microlenses directly on the APD back surface. This approach yields APDs with low dark count rates (DCRs) and higher radiation tolerance for harsh environments and can be extended to large arrays of APDs.
    Type: Application
    Filed: January 31, 2020
    Publication date: October 8, 2020
    Inventors: Brian F. AULL, Joseph S. Ciampi, Renee D. Lambert, Christopher Leitz, Karl Alexander McIntosh, Steven Rabe, Kevin Ryu, Daniel R. SCHUETTE, David Volfson
  • Patent number: 8710424
    Abstract: Embodiments of the present invention include an electron counter with a charge-coupled device (CCD) register configured to transfer electrons to a Geiger-mode avalanche diode (GM-AD) array operably coupled to the output of the CCD register. At high charge levels, a nondestructive amplifier senses the charge at the CCD register output to provide an analog indication of the charge. At low charge levels, noiseless charge splitters or meters divide the charge into single-electron packets, each of which is detected by a GM-AD that provides a digital output indicating whether an electron is present. Example electron counters are particularly well suited for counting photoelectrons generated by large-format, high-speed imaging arrays because they operate with high dynamic range and high sensitivity. As a result, they can be used to image scenes over a wide range of light levels.
    Type: Grant
    Filed: December 3, 2012
    Date of Patent: April 29, 2014
    Assignee: Massachusetts Institute of Technology
    Inventors: David C. Shaver, Bernard B. Kosicki, Robert K. Reich, Dennis D. Rathman, Daniel R. Schuette, Brian F. Aull
  • Patent number: 8426797
    Abstract: Embodiments of the present invention include complementary metal-oxide-semiconductor (CMOS) readout architectures for photon-counting arrays with a photon-counting detector, a digital counter, and an overflow bit in each of the sensing elements in the array. Typically, the photon-counting detector is a Geiger-mode avalanche photodiode (APD) that emits brief pulses every time it detects a photon. The pulse increments the digital counters, which, in turn, sets the overflow bit once it reaches a given count. A rolling readout system operably coupled to each sensing element polls the overflow bit, and, if the overflow bit is high, initiates a data transfer from the overflow bit to a frame store. Compared to other photo-counting imagers, photon-counting imagers with counters and overflow bits operate with decreased transfer bandwidth, high dynamic range, and fine spatial resolution.
    Type: Grant
    Filed: March 23, 2010
    Date of Patent: April 23, 2013
    Assignee: Massachusetts Institute of Technology
    Inventors: Brian F. Aull, Matthew J. Renzi, Robert K. Reich, Daniel R. Schuette
  • Patent number: 8324554
    Abstract: Embodiments of the present invention include an electron counter with a charge-coupled device (CCD) register configured to transfer electrons to a Geiger-mode avalanche diode (GM-AD) array operably coupled to the output of the CCD register. At high charge levels, a nondestructive amplifier senses the charge at the CCD register output to provide an analog indication of the charge. At low charge levels, noiseless charge splitters or meters divide the charge into single-electron packets, each of which is detected by a GM-AD that provides a digital output indicating whether an electron is present. Example electron counters are particularly well suited for counting photoelectrons generated by large-format, high-speed imaging arrays because they operate with high dynamic range and high sensitivity. As a result, they can be used to image scenes over a wide range of light levels.
    Type: Grant
    Filed: March 23, 2010
    Date of Patent: December 4, 2012
    Assignee: Massachusetts Institute of Technology
    Inventors: David C. Shaver, Bernard B. Kosicki, Robert K. Reich, Dennis D Rathman, Daniel R. Schuette, Brian F. Aull
  • Publication number: 20110235771
    Abstract: Embodiments of the present invention include complementary metal-oxide-semiconductor (CMOS) readout architectures for photon-counting arrays with a photon-counting detector, a digital counter, and an overflow bit in each of the sensing elements in the array. Typically, the photon-counting detector is a Geiger-mode avalanche photodiode (APD) that emits brief pulses every time it detects a photon. The pulse increments the digital counters, which, in turn, sets the overflow bit once it reaches a given count. A rolling readout system operably coupled to each sensing element polls the overflow bit, and, if the overflow bit is high, initiates a data transfer from the overflow bit to a frame store. Compared to other photo-counting imagers, photon-counting imagers with counters and overflow bits operate with decreased transfer bandwidth, high dynamic range, and fine spatial resolution.
    Type: Application
    Filed: March 23, 2010
    Publication date: September 29, 2011
    Applicant: Massachusetts Institute of Technology
    Inventors: Brian F. Aull, Matthew J. Renzi, Robert K. Reich, Daniel R. Schuette
  • Publication number: 20110233386
    Abstract: Embodiments of the present invention include an electron counter with a charge-coupled device (CCD) register configured to transfer electrons to a Geiger-mode avalanche diode (GM-AD) array operably coupled to the output of the CCD register. At high charge levels, a nondestructive amplifier senses the charge at the CCD register output to provide an analog indication of the charge. At low charge levels, noiseless charge splitters or meters divide the charge into single-electron packets, each of which is detected by a GM-AD that provides a digital output indicating whether an electron is present. Example electron counters are particularly well suited for counting photoelectrons generated by large-format, high-speed imaging arrays because they operate with high dynamic range and high sensitivity. As a result, they can be used to image scenes over a wide range of light levels.
    Type: Application
    Filed: March 23, 2010
    Publication date: September 29, 2011
    Applicant: Massachusetts Institute of Technology
    Inventors: David C. Shaver, Bernard B. Kosicki, Robert K. Reich, Dennis D. Rathman, Daniel R. Schuette, Brian F. Aull