Patents by Inventor Daniel R. Steinberg

Daniel R. Steinberg has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8595680
    Abstract: According to one general aspect, a method may include simulating a memory circuit, wherein the memory circuit is configured to store data. The method may also include receiving, by the simulated memory circuit, a memory access operation. The method may further include dynamically determining, in response to the memory access, if, based on a set of predefined criteria, the simulated memory circuit should generate a memory error as the result of the memory access. The method may also include, if the simulated memory circuit is to generate the memory error, generating the memory error as the result of the memory access.
    Type: Grant
    Filed: June 15, 2012
    Date of Patent: November 26, 2013
    Assignee: Google Inc.
    Inventor: Daniel R. Steinberg
  • Patent number: 7061294
    Abstract: Clock processing logic and method for determining clock signal characteristics in reference voltage and temperature varying environments are described. A sample vector is characterized by bit locations corresponding to sequentially increasing delay values so that values stored in such bit locations indicate clock signal edges where value transitions occur. In one embodiment, edge detection logic and sensitivity adjustment logic are used in determining the clock period from such a sample vector. In another embodiment, an edge filter, sample accumulation logic, and clock period and jitter processing logic are used in determining an average clock period and clock jitter from a predefined number of such sample vectors.
    Type: Grant
    Filed: January 25, 2005
    Date of Patent: June 13, 2006
    Assignee: Integrated Device Technology, Inc.
    Inventors: Cesar A. Talledo, Daniel R. Steinberg
  • Patent number: 6867630
    Abstract: Clock processing logic and method for determining clock signal characteristics in reference voltage and temperature varying environments are described. A sample vector is characterized by bit locations corresponding to sequentially increasing delay values so that values stored in such bit locations indicate clock signal edges where value transitions occur. In one embodiment, edge detection logic and sensitivity adjustment logic are used in determining the clock period from such a sample vector. In another embodiment, an edge filter, sample accumulation logic, and clock period and jitter processing logic are used in determining an average clock period and clock jitter from a predefined number of such sample vectors.
    Type: Grant
    Filed: July 15, 2003
    Date of Patent: March 15, 2005
    Assignee: Integrated Device Technology, Inc.
    Inventors: Cesar A. Talledo, Daniel R. Steinberg
  • Patent number: 6550275
    Abstract: A gemstone setting is disclosed with rounded gemstones with outer faceted surfaces, each gemstone forming an outwardly contoured or convex gemstone configuration which is invisibly set in flush, surface to surface, mating relation within the setting. A section of a rounded gemstone is cut away, leaving a concave inset within and a curved concave inner surface on the gemstone. This concave configuration allows the partially cut away gemstone to mate in flush, surface to surface relation with the convex outer surface of the adjacent gemstone. Grooves within the side facets of the gemstone invisibly set the gemstones in position within supporting housings. The setting of gemstones in this fashion, employing surface to surface flush mating contact, can be used in infinite jewelry designs which employ rounded, curved edge, contoured or generally convex configured gemstones.
    Type: Grant
    Filed: February 23, 2001
    Date of Patent: April 22, 2003
    Inventor: Daniel R. Steinberg
  • Publication number: 20020116948
    Abstract: A gemstone setting is disclosed with rounded gemstones with outer faceted surfaces, each gemstone forming an outwardly contoured or convex gemstone configuration which is invisibly set in flush, surface to surface, mating relation within the setting. A section of a rounded gemstone is cut away, leaving a concave inset within and a curved concave inner surface on the gemstone. This concave configuration allows the partially cut away gemstone to mate in flush, surface to surface relation with the convex outer surface of the adjacent gemstone. Grooves within the side facets of the gemstone invisibly set the gemstones in position within supporting housings. The setting of gemstones in this fashion, employing surface to surface flush mating contact, can be used in infinite jewelry designs which employ rounded, curved edge, contoured or generally convex configured gemstones.
    Type: Application
    Filed: February 23, 2001
    Publication date: August 29, 2002
    Inventor: Daniel R. Steinberg
  • Patent number: 6032485
    Abstract: A piece of jewelry, like a ring, bracelet, or necklace containing a center opening, consists of a main body section which takes the shape of the piece. This section has a channel extending around its side walls into which arms from covers are inserted. The covers overlay the main body section and slidably move over the main body section by means of the arms in the channels. In the preferred embodiment, two covers are provided on the main body section, although one or more than two covers are contemplated. The two covers slidably move in opposite directions on the main body section. The covers may have decorative ornamentation on their outer surfaces. When they are placed together and locked into position by a spring detent, the jewelry has one appearance. When the covers are together, they also conceal and protect the gem, inscription, or other decorative ornamentation on the top surface of the main body section.
    Type: Grant
    Filed: March 10, 1998
    Date of Patent: March 7, 2000
    Inventor: Daniel R. Steinberg
  • Patent number: D459678
    Type: Grant
    Filed: February 23, 2001
    Date of Patent: July 2, 2002
    Inventor: Daniel R. Steinberg
  • Patent number: D460714
    Type: Grant
    Filed: February 23, 2001
    Date of Patent: July 23, 2002
    Inventor: Daniel R. Steinberg
  • Patent number: D413279
    Type: Grant
    Filed: January 22, 1999
    Date of Patent: August 31, 1999
    Inventor: Daniel R. Steinberg
  • Patent number: D413544
    Type: Grant
    Filed: January 22, 1999
    Date of Patent: September 7, 1999
    Inventor: Daniel R. Steinberg
  • Patent number: D429475
    Type: Grant
    Filed: October 25, 1999
    Date of Patent: August 15, 2000
    Assignee: Daniel Steinberg
    Inventor: Daniel R. Steinberg