Abstract: An electronic device comprises a heat source and a heat distribution structure coupled to the heat source to distribute heat generated by the heat source during operation of the electronic device.

Abstract: Apparatus, systems, and methods for intelligent tuning of overclocking frequency are disclosed. An example apparatus includes trial control circuitry to execute an optimization model to select first values for overclocking parameters of a processor, the first values associated with a first trial, and perform benchmark testing of the processor when the processor is operating based on the first values; trial evaluation circuitry to calculate a first score for the first trial based on the benchmark testing; and model updating circuitry to perform a comparison of the first score to a second score, the second score associated with a second trial for second values for the overclocking parameters, the second values different than the first values; and select one of the first values or the second values to overclock the processor based on the comparison.

Abstract: A system for carrying out gas chromatography/mass spectroscopy (GC/MS) on gasses trapped in glass solidified from molten glass includes a glass sample vacuum chamber having a gas inlet, a gas outlet, and an introduction port for receiving the glass sample; a crushing tool for crushing the glass sample; a gas sample vacuum chamber disposed in downstream fluid communication with the glass sample vacuum chamber; a supply of carrier gas in fluid communication with the glass sample vacuum chamber; a GC/MS analyzer in downstream fluid communication with the gas sample vacuum chamber; an injector in fluid communication between the GC/MS analyzer and the gas sample vacuum chamber and for injecting the gas sample into the GC/MS analyzer; a gather valve in fluid communication between the glass and gas sample vacuum chambers; and a booster in fluid communication with the gas sample vacuum chamber.

Abstract: Methods, apparatus, and articles of manufacture to dynamically configure overclocking frequency have been disclosed. An example apparatus include a clock rate adjuster to cause a processor core to operate at a first overclocked clock rate; a comparator to compare a sensed temperature corresponding to the processor core to a threshold; and the clock rate adjuster to, when the sensed temperature satisfies the threshold, decrease a clock rate of the processor core from the first overclocked clock rate by a user-defined amount, the decreased clock rate being above a normal operating clock rate of the processor core.

Abstract: Techniques and mechanisms for an integrated circuit (IC) chip to generate a clock signal for use by one or more resources of the IC chip. In an embodiment, a clock signal is generated with phase-locked loop (PLL) circuitry of an IC chip based on a cyclical signal which is provided to the IC chip by an external source. A supply voltage provided to the PLL circuitry is automatically updated based on one of a requested frequency for the clock signal, a frequency of the received cyclical signal, or a voltage of a control signal used by a voltage controlled oscillator of the PLL circuitry. In another embodiment, a series of incremental changes to a frequency of the clock signal is automatically performed according to a predefined overclocking scheme or underclocking scheme.

Abstract: Techniques and mechanisms for an integrated circuit (IC) chip to generate a clock signal for use by one or more resources of the IC chip. In an embodiment, a clock signal is generated with phase-locked loop (PLL) circuitry of an IC chip based on a cyclical signal which is provided to the IC chip by an external source. A supply voltage provided to the PLL circuitry is automatically updated based on one of a requested frequency for the clock signal, a frequency of the received cyclical signal, or a voltage of a control signal used by a voltage controlled oscillator of the PLL circuitry. In another embodiment, a series of incremental changes to a frequency of the clock signal is automatically performed according to a predefined overclocking scheme or underclocking scheme.

Abstract: According to one embodiment of the invention, an integrated circuit device at least one compute engine and a control unit. Coupled to the compute engine(s), the control unit is adapted to dynamically control an energy-efficient operating setting of at least one power management parameter for the integrated circuit device after execution of Basic Input/Output System (BIOS) has already completed.

Abstract: According to one embodiment of the invention, an integrated circuit device at least one compute engine and a control unit. Coupled to the compute engine(s), the control unit is adapted to dynamically control an energy-efficient operating setting of at least one power management parameter for the integrated circuit device after execution of Basic Input/Output System (BIOS) has already completed.

Abstract: A method and apparatus include providing a printed circuit board (PCB) having at least one light permeable layer, at least one non-light permeable layer having at least one void therethrough that may be vertically aligned with the at least one light permeable layer, and a source of illumination to simultaneously illuminate through the void and the at least one light permeable layer.