Abstract: We describe a converter for generating a multi-phase output voltage that uses a three-level converter having Upper pairs of switches (Upper and Mid-Lower) and Lower pairs switches (Lower and Mid-Upper) arranged between positive and negative DC input voltages and an Intermediate DC voltage. A controller controls the Upper and Lower pairs of switches using PWM over a plurality of PWM periods to generate the multi-phase AC output voltages. For each PWM period, the controller controls the respective Upper or Lower pair of switches to apply respectively either a positive or a negative offset voltage simultaneously to each of the phase outputs, wherein the positive and negative offset voltages represent an average peak to peak voltage for the phase output voltage that is offset respectively positively or negatively from the intermediate DC voltage. Advantageously, conduction losses may be reduced when the intermediate DC voltage not the same as the average phase voltage.

Abstract: We describe a power converter cooling arrangement in which a base has a top plate of a thermally conductive material, and a bottom plate and side walls define a chamber. An inlet and outlet are in fluid communication with the chamber, and the chamber is flooded with a cooling fluid that flows between the inlet and outlet. A PCB of a power converter is mounted to, and thermally coupled with, the top plate, where the PCB receives a plurality of power modules (that are used in the power conversion). The base comprises a plurality of fluid channels for flowing cooling fluid therethrough. Each of the fluid channels is arranged to coincide with a location of one or more components mounted to the PCB.

Abstract: The semiconductor cooling arrangement comprises one or more semiconductor assemblies, a housing, and one or more baffles. Each semiconductor assembly comprises a heatsink, a semiconductor die, an encapsulant, and electrical connections. The semiconductor die is bonded to the heatsink and contains a semiconductor power device. The encapsulant covers the semiconductor die. The side of the heatsink to which the semiconductor die is bonded extends beyond the encapsulant. The electrical connections pass through the encapsulant and to the semiconductor die. The housing has a chamber for housing the one or more assemblies. Each baffle comprises through-holes arranged such that fluid flows through the through-holes to a region of a respective semiconductor assembly to which the semiconductor power device is mounted, or to a region of the heatsink of the semiconductor assembly opposite a location to which the semiconductor power device is mounted.

Abstract: A semiconductor cooling arrangement. The semiconductor cooling arrangement comprises one or more semiconductor assemblies, a housing, and one or more baffles. Each assembly comprises a heatsink and one or more semiconductor power devices mounted on and thermally coupled to the heatsink. The housing is for housing the one or more assemblies in a chamber within the housing, and comprises inlet and outlet ports in fluid communication with the chamber. The baffles are arranged such that fluid flows through each baffle to a respective heatsink. Each baffle comprises through-holes arranged such that fluid flows through the through holes to a region of the semiconductor assembly to which a semiconductor power device is mounted, or to a region of the heatsink opposite a location to which a semiconductor power device is mounted.