Patents by Inventor Daniel Ryan Vance

Daniel Ryan Vance has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Hardware memory error tolerant software system
    Patent number: 12493519
    Abstract: Systems and methods that enable hardware memory error tolerant software systems. For instance, the system may comprise a host device that instantiates a kernel agent in response to one or more requests to access hardware memory, determines, by the kernel agent based on the received information, whether the request to access memory will cause access to a corrupt memory location, and skip an operation associated with the corrupt memory location in response to determining that the request will access a corrupt memory location. The systems may also include a system that detects software vulnerabilities to hardware memory errors.
    Type: Grant
    Filed: March 4, 2024
    Date of Patent: December 9, 2025
    Assignee: Google LLC
    Inventors: Jue Wang, Daniel Ryan Vance
  • Hardware Memory Error Tolerant Software System
    Publication number: 20240202072
    Abstract: Systems and methods that enable hardware memory error tolerant software systems. For instance, the system may comprise a host device that instantiates a kernel agent in response to one or more requests to access hardware memory, determines, by the kernel agent based on the received information, whether the request to access memory will cause access to a corrupt memory location, and skip an operation associated with the corrupt memory location in response to determining that the request will access a corrupt memory location. The systems may also include a system that detects software vulnerabilities to hardware memory errors.
    Type: Application
    Filed: March 4, 2024
    Publication date: June 20, 2024
    Inventors: Jue Wang, Daniel Ryan Vance
  • Hardware memory error tolerant software system
    Patent number: 11947420
    Abstract: Systems and methods that enable hardware memory error tolerant software systems. For instance, the system may comprise a host device that instantiates a kernel agent in response to one or more requests to access hardware memory, determines, by the kernel agent based on the received information, whether the request to access memory will cause access to a corrupt memory location, and skip an operation associated with the corrupt memory location in response to determining that the request will access a corrupt memory location. The systems may also include a system that detects software vulnerabilities to hardware memory errors.
    Type: Grant
    Filed: December 15, 2021
    Date of Patent: April 2, 2024
    Assignee: Google LLC
    Inventors: Jue Wang, Daniel Ryan Vance
  • Hardware Memory Error Tolerant Software System
    Publication number: 20230185663
    Abstract: Systems and methods that enable hardware memory error tolerant software systems. For instance, the system may comprise a host device that instantiates a kernel agent in response to one or more requests to access hardware memory, determines, by the kernel agent based on the received information, whether the request to access memory will cause access to a corrupt memory location, and skip an operation associated with the corrupt memory location in response to determining that the request will access a corrupt memory location. The systems may also include a system that detects software vulnerabilities to hardware memory errors.
    Type: Application
    Filed: December 15, 2021
    Publication date: June 15, 2023
    Applicant: Google LLC
    Inventors: Jue Wang, Daniel Ryan Vance