Patents by Inventor Daniel S. Lee

Daniel S. Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11950036
    Abstract: An electronic device can include a housing defining an aperture and a display positioned in the aperture. The display and the housing can define an internal volume in which a speaker assembly is positioned. The speaker assembly can include a speaker module and a speaker enclosure in fluid communication, with the speaker enclosure at least partially defining a speaker volume.
    Type: Grant
    Filed: February 7, 2023
    Date of Patent: April 2, 2024
    Assignee: APPLE INC.
    Inventors: Paul X. Wang, Chanjuan Feng, Christopher Wilk, Dinesh C. Mathew, Keith J. Hendren, Stuart M. Nevill, Daniel K. Boothe, Nicholas A Rundle, Simon S. Lee, Xiang Zhang, Thomas H. Tsang, Rebecca J. Mikolajczyk
  • Patent number: 11918871
    Abstract: Embodiments of golf club heads having adjustable weighting systems with a plurality of discrete attachment locations capable of receiving one or more weights are described herein. The golf club heads described herein provide user adjustability of club head center of gravity to adjust ball flight while maintaining a high moment of inertia and low and back center of gravity position.
    Type: Grant
    Filed: March 11, 2022
    Date of Patent: March 5, 2024
    Assignee: Karsten Manufacturing Corporation
    Inventors: Martin R. Jertson, Ryan M. Stokke, Xiaojian Chen, Cory S. Bacon, Jeremy Pope, Daniel K. Lee, David A. Higdon, Eric J. Morales
  • Patent number: 6668347
    Abstract: An integrated circuit having a central built-in self-test unit (BIST) that uses internal scan chains for testing embedded memory modules. The embedded memory modules receive address and data signals from a set of input flip-flops configured to form a scan chain. The BIST is coupled to an input scan chain and includes a pattern generator to shift a test pattern into the input scan chain for testing the embedded memory modules. Output flip-flops capture data from the embedded memory modules are also configured as a scan chain. The BIST includes address control logic to bypass the normal addressing logic of the embedded memory module when the BIST operates is operating in a memory test mode.
    Type: Grant
    Filed: May 8, 2000
    Date of Patent: December 23, 2003
    Assignee: Intel Corporation
    Inventors: Anthony Babella, Patrick P. Chan, Chih-Jen (Mike) Lin, Thomas J. Shewchuk, Daniel S. Lee
  • Patent number: 4958738
    Abstract: A combined clothing rack and hanger device which includes a main rack having a plurality of hook hangers disposed on one side and a plurality of squeezing hangers disposed on the other side thereof, and a channel engagement mounted to one end of the main rack, whereby the plurality of hanger devices are disposed in parallel by engaging the main rack on a rail support through the channel engagement.
    Type: Grant
    Filed: October 26, 1989
    Date of Patent: September 25, 1990
    Inventor: Daniel S. Lee