Abstract: Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for providing a user with feedback regarding power consumption in a battery-operated electronic device. In one aspect, a method performed by data processing apparatus includes identifying, using the data processing apparatus, usage of a hardware component of a battery-operated electronic device that includes the data processing apparatus, attributing the usage of the hardware component to the hardware component or to a software application that uses the hardware component, recording, using the data processing apparatus, a power consumption resulting from the usage, and presenting power consumption feedback to a user using the data processing apparatus. The power consumption feedback identifies the hardware component or the software application of the electronic device and the power consumption resulting from the usage.

Abstract: The subject matter of this specification can be embodied in, among other things, a computer-implemented method that includes identifying one or more previous locations for a mobile electronic device; identifying a plurality of possible travel routes for the mobile electronic device; determining possible locations for the mobile electronic device along the possible travel routes based on determined travel speed information for areas near the previous locations; and providing information for one or more indications of the possible locations to a user.

Abstract: Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for providing a user with feedback regarding power consumption in a battery-operated electronic device. In one aspect, a method performed by data processing apparatus includes identifying, using the data processing apparatus, usage of a hardware component of a battery-operated electronic device that includes the data processing apparatus, attributing the usage of the hardware component to the hardware component or to a software application that uses the hardware component, recording, using the data processing apparatus, a power consumption resulting from the usage, and presenting power consumption feedback to a user using the data processing apparatus. The power consumption feedback identifies the hardware component or the software application of the electronic device and the power consumption resulting from the usage.

Abstract: Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for providing a user with feedback regarding power consumption in a battery-operated electronic device. In one aspect, a method performed by data processing apparatus includes identifying, using the data processing apparatus, usage of a hardware component of a battery-operated electronic device that includes the data processing apparatus, attributing the usage of the hardware component to the hardware component or to a software application that uses the hardware component, recording, using the data processing apparatus, a power consumption resulting from the usage, and presenting power consumption feedback to a user using the data processing apparatus. The power consumption feedback identifies the hardware component or the software application of the electronic device and the power consumption resulting from the usage.

Abstract: Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for providing a user with feedback regarding power consumption in a battery-operated electronic device. In one aspect, a method performed by data processing apparatus includes identifying, using the data processing apparatus, usage of a hardware component of a battery-operated electronic device that includes the data processing apparatus, attributing the usage of the hardware component to the hardware component or to a software application that uses the hardware component, recording, using the data processing apparatus, a power consumption resulting from the usage, and presenting power consumption feedback to a user using the data processing apparatus. The power consumption feedback identifies the hardware component or the software application of the electronic device and the power consumption resulting from the usage.

Abstract: Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for providing a user with feedback regarding power consumption in a battery-operated electronic device. In one aspect, a method performed by data processing apparatus includes identifying, using the data processing apparatus, usage of a hardware component of a battery-operated electronic device that includes the data processing apparatus, attributing the usage of the hardware component to the hardware component or to a software application that uses the hardware component, recording, using the data processing apparatus, a power consumption resulting from the usage, and presenting power consumption feedback to a user using the data processing apparatus. The power consumption feedback identifies the hardware component or the software application of the electronic device and the power consumption resulting from the usage.

Abstract: One embodiment of the present invention provides a system for testing a binding Application Programming Interface (API) on a device, wherein the binding API is bound to a native API for the device and provides different commands than the native API. During operation, the system executes a native-API test on the device through the native API to produce a native-API test-result. The system subsequently receives the native-API test-result from the device at a test-harness. Next, the system sends a binding-API test to a test-agent on the device which enables the test-agent to execute the binding-API test through the binding API to produce a binding-API test-result. The system then receives the binding-API test-result from the test-agent. Finally, the system compares the native-API test-result to the binding-API test-result to determine if the binding API is functionally equivalent to the native API.

Abstract: Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for providing a user with feedback regarding power consumption in a battery-operated electronic device. In one aspect, a method performed by data processing apparatus includes identifying, using the data processing apparatus, usage of a hardware component of a battery-operated electronic device that includes the data processing apparatus, attributing the usage of the hardware component to the hardware component or to a software application that uses the hardware component, recording, using the data processing apparatus, a power consumption resulting from the usage, and presenting power consumption feedback to a user using the data processing apparatus. The power consumption feedback identifies the hardware component or the software application of the electronic device and the power consumption resulting from the usage.

Abstract: Texture mapping includes (i) calculating the weighted average of the colors of two texels near a particular pixel, (ii) determining a fractional portion of a texture coordinate of the pixel, and (iii) retrieval of a pair of complementary coefficients from a table of pairs of predetermined, complementary coefficients according to the fractional portion of the coordinate of the pixel. Each of the complementary coefficients corresponds to the relative distance between the pixel and each of the two texels as represented by the fractional portion of the first coordinate of the pixel in the coordinate space of the texture image since each texel has whole, integer coordinates in the coordinate space of the texture image. Each coefficient of the pair of complementary coefficients is used to weight a respective one of the colors of the two texels and the weighted colors are summed to produce a weighted average color of the two texels.

Abstract: According to the invention, a process for averaging two pixel values is disclosed. In one step, an instruction is decoded. A plurality of first operands is loaded from a first input register. A plurality of second operands is loaded from a second input register. An average of one of the plurality of first operands and one of the plurality of second operands is produced. The average is stored in an output register.

Abstract: A processing pipeline and method are disclosed that may enable real time video rate displacement mapping. The pipeline may include one or more: render units, texture units, memories, and displacement units. Render units may tessellate a geometric primitive into micropolygons and interpolate parameter values for each new vertex. The micropolygons may be defined by the intersection of the geometric primitive and boundaries projected from specified screen space regions. Texture units retrieve displacement values from a displacement map stored in memory. Displacement units displace each vertex of a micropolygon in the direction of the normal at each vertex by a distance based on the displacement value determined for the vertex location. Micropolygons that are displaced across a projected boundary may be returned to the render units and re-tessellated according to the projected boundaries. Parameter values for new vertices may be determined subject to an edge contract to prevent surface cracks.

Abstract: According to the invention, a processing core is disclosed that includes a first source register, a number of second operands, a destination register, and a number of arithmetic processors. A bitwise inverter is coupled to at least one of the first number of operands and the second number of operands. The first source register includes a plurality of first operands and the destination register includes a plurality of results. The number of arithmetic processors are respectively coupled to the first operands, second operands and results, wherein each arithmetic processor computes one of a sum and a difference of the first operand and a respective second operand.

Abstract: A graphical processing system comprising a computational unit and a shadow processing unit coupled to the computational unit through a communication bus. The computational unit is configured to transfer coordinates C1 of a point P with respect to a first space to the shadow processing unit. In response to receiving the coordinates C1, the shadow processing unit is configured to: (a) transform the coordinate C1 to determine map coordinates s and t and a depth value Dp for the point P, (b) access a neighborhood of depth values from a memory using the map coordinates s and t, (c) compare the depth value DP to the depth values of the neighborhood, (d) filter binary results of the comparisons to determine a shadow fraction, and (e) transfer the shadow fraction to the computational unit through the communication bus.

Abstract: A processing core comprising R-number of processing pipelines each comprising N-number of processing paths. Each of the R-number of processing pipelines are synchronized together to operate as a single very long instruction word (VLIW) processing core. The VLIW processing core is configured to process R×N-number of VLIW sub-instructions in parallel. In addition, the R-number of pipelines can be configured to operate independently as separately operating pipelines. In accordance with one embodiment of the present invention, each of the R-number of processing pipelines comprises S-number of register files, such that the processing core comprises R×S-number of register files. In accordance with another embodiment of the present invention, each of the R-number of processing pipelines comprises one register file for every two of the N-number of processing paths, such that S=N/2.

Abstract: According to the invention, a processing core is disclosed. The processing core includes one or more processing pipelines and a number of register flies. The processing pipelines having a total of N-number of processing paths, where each of the processing paths processes instructions on M-bit data words. Each of the number of register files has Q-number of registers that are each M-bits wide. The Q-number of registers within each of the plurality of register files are either private or global registers. When a value is written to one of said Q-number of said registers, which is a global register within one of said number of register files, the value is propagated to a corresponding global register in the other of the number of register files. When a value is written to one of said Q-number of the registers, which is a private register within one of said number of register files, the value is not propagated to a corresponding register in the other of said number of register files.

Abstract: According to the invention, a processing core that includes a first source register, a second source register, a multiplexer, a destination register, and an operand processor is disclosed. The first source register includes a plurality of source fields. The second source register includes a number of result field select values and a number of operation fields. The multiplexer is coupled to at least one of the source fields. Included in the destination register is a plurality of result fields. The operand processor and multiplexer operate upon at least one of the source fields.

Abstract: A graphical computing system including a host processor and a target processor. In response to execution of stored instructions, the host processor is operable to: (a) receive input code for a program and a set of constraints on input variables of the program, (b) compile a specialized version VK of the input code for each constraint CK of said constraint set and store the specialized version VK in a local memory, (c) receive particular values of the input variables in response to a run-time invocation of the program, (d) search the constraint set to determine if the particular values satisfy any of the constraints of the constraint set, and (e) in response to determining that the particular values satisfy a constraint CL of the constraint set, invoking execution of the specialized version VL by the target processor.

Abstract: A processing pipeline and method are disclosed that may enable real time video rate displacement mapping. The pipeline may include one or more: render units, texture units, memories, and displacement units. Render units may tessellate a geometric primitive into micropolygons and interpolate parameter values for each new vertex. The micropolygons may be defined by the intersection of the geometric primitive and boundaries projected from specified screen space regions. Texture units retrieve displacement values from a displacement map stored in memory. Displacement units displace each vertex of a micropolygon in the direction of the normal at each vertex by a distance based on the displacement value determined for the vertex location. Micropolygons that are displaced across a projected boundary may be returned to the render units and re-tessellated according to the projected boundaries. Parameter values for new vertices may be determined subject to an edge contract to prevent surface cracks.

Abstract: A graphical processing system comprising a computational unit and a shadow processing unit coupled to the computational unit through a communication bus. The computational unit is configured to transfer coordinates C1 of a point P with respect to a first space to the shadow processing unit. In response to receiving the coordinates C1, the shadow processing unit is configured to: (a) transform the coordinate C1 to determine map coordinates s and t and a depth value DP for the point P, (b) access a neighborhood of depth values from a memory using the map coordinates s and t, (c) compare the depth value DP to the depth values of the neighborhood, (d) filter binary results of the comparisons to determine a shadow fraction, and (e) transfer the shadow fraction to the computational unit through the communication bus.

Abstract: According to the invention, a process for averaging two pixel values is disclosed. In one step, an instruction is decoded. A plurality of first operands is loaded from a first input register. A plurality of second operands is loaded from a second input register. An average of one of the plurality of first operands and one of the plurality of second operands is produced. The average is stored in an output register.