Abstract: Automatic test pattern generator for generating test patterns that are capable of detecting faults in a digital combinational circuit comprises a first forward network capable of emulating the digital combinational circuit; a second forward network capable of emulating the digital combinational circuit in the presence of any one target fault from a specified set of faults, and receiving a set of control signals for selecting the target fault; a first backward network having one primary input for every primary output of the digital combinational circuit and one primary output for every primary input of the digital combinational circuit, the first backward network generating one fault activation objective corresponding to the selected target fault, and receiving first signal values computed in the first forward network for propagating the fault activation objective towards a primary output; a second backward network having one primary input for every primary output of the digital combinational circuit and one p