Abstract: A semiconductor device includes a semiconductor body having first and second opposite surfaces along a vertical direction, and an active diode area. The active diode area includes: a p-doped anode region adjoining the first surface; an n-doped drift region between the anode region and the second surface; an n-doped cathode contact region adjoining the second surface; a p-doped injection region adjoining the second surface and the cathode contact region; and a p-doped auxiliary region between the drift region and the cathode contact region. The auxiliary region includes first and second sub-regions. In a top view, the first sub-region covers at least part of the injection region and the second sub-region covers at least part of the cathode contact region. In the top view, the auxiliary region includes a plurality of openings covering from 0.1% to an 20% of a surface area of the active diode area at the second surface.

Abstract: A power semiconductor device includes at a first side and electrically isolated from first and second load terminals, first control electrodes for controlling a load current in first semiconductor channel structures formed in an active region at the first side, and at a second side and electrically isolated from the first and second load terminals, second control electrodes for controlling the load current in second semiconductor channel structures formed in the active region at the second side. At the second side and in a contiguous area of modified control (AMC) belonging to the active region and having a lateral extension of at least 30% of a thickness of a semiconductor body of the device, either no second control electrodes are provided or the second control electrodes are less effective in removing free charge carriers out of the power semiconductor device than the second control electrodes outside the AMC.

Abstract: A method of manufacturing semiconductor devices includes processing a semiconductor body at a first surface of the semiconductor body, including forming a wiring area over the first surface. Thereafter, the method further includes forming a field stop region in the semiconductor body. Forming the field stop region includes introducing implant ions including selenium into the semiconductor body through a second (opposite) surface of the semiconductor body by an ion implantation process. A main beam direction of the ion implantation process deviates from a main crystal direction of the semiconductor body, along which channeling of implant ions occurs, by at most 1 degree and a main beam incidence angle divergence is at most ±0.5 degree. Forming the field stop region further includes electrically activating at least part of the selenium by a laser annealing process.

Abstract: A semiconductor device includes: a semiconductor body having a first surface and a second surface; a plurality of semiconductor device elements in the semiconductor body at the first surface; a wiring area over the first surface of the semiconductor body; and an impurity in the semiconductor body. A profile of concentration of the impurity has a penetration depth from the second surface into the semiconductor body along a vertical direction. The profile of concentration has a concentration plateau along a vertical segment ranging from 30% to 70% of the penetration depth, the plateau having a fluctuation of the concentration of less than 20%.

Abstract: An insulated gate bipolar transistor (IGBT) is proposed. The IGBT includes a semiconductor body having a first surface and a second surface. The IGBT further includes an active area and an edge termination area that at least partly surrounds the active area. The active area includes a first part of an active IGBT area and a second part of the active IGBT area. The IGBT further includes a contact on the second surface of the semiconductor body. A minimum vertical distance between the contact in the first part of the active IGBT area and a reference level at the first surface is larger than a minimum vertical distance between the contact in the second part of the active IGBT area and the reference level at the first surface.

Abstract: A method of manufacturing a semiconductor device in a semiconductor body having a first surface and a second surface is proposed. Semiconductor device elements are formed in the semiconductor body by processing the semiconductor body at the first surface. A wiring area is formed over the first surface of the semiconductor body. The semiconductor body is attached to a carrier via the wiring area. Thereafter, ions are implanted through the second surface into the semiconductor body. The ions are ions of a doping element, or ions, which induce doping by complex formation, or ions of a heavy metal. A surface region of the semiconductor body at the second surface is irradiated with a plurality of laser pulses. Thereafter, the carrier is removed from the semiconductor body.

Abstract: A method of manufacturing semiconductor devices in a silicon MCZ (magnetic Czochralski) semiconductor body is proposed. The method includes processing the silicon MCZ semiconductor body by an oxidation process at temperatures exceeding 1150° C. and below 1220° C. Thereafter, platinum (Pt) is introduced into the silicon MCZ semiconductor body.

Abstract: A semiconductor device includes a semiconductor body having first and second opposite surfaces along a vertical direction, and an active diode area. The active diode area includes: a p-doped anode region adjoining the first surface; an n-doped drift region between the anode region and the second surface; an n-doped cathode contact region adjoining the second surface; a p-doped injection region adjoining the second surface and the cathode contact region; and a p-doped auxiliary region between the drift region and the cathode contact region. The auxiliary region includes first and second sub-regions. In a top view, the first sub-region covers at least part of the injection region and the second sub-region covers at least part of the cathode contact region. In the top view, the auxiliary region includes a plurality of openings covering from 0.1% to an 20% of a surface area of the active diode area at the second surface.

Abstract: A power semiconductor device includes at a first side and electrically isolated from first and second load terminals, first control electrodes for controlling a load current in first semiconductor channel structures formed in an active region at the first side, and at a second side and electrically isolated from the first and second load terminals, second control electrodes for controlling the load current in second semiconductor channel structures formed in the active region at the second side. At the second side and in a contiguous area of modified control (AMC) belonging to the active region and having a lateral extension of at least 30% of a thickness of a semiconductor body of the device, either no second control electrodes are provided or the second control electrodes are less effective in removing free charge carriers out of the power semiconductor device than the second control electrodes outside the AMC.

Abstract: A method of manufacturing a semiconductor device in a semiconductor body having a first surface and a second surface is proposed. Semiconductor device elements are formed in the semiconductor body by processing the semiconductor body at the first surface. A wiring area is formed over the first surface of the semiconductor body. The semiconductor body is attached to a carrier via the wiring area. Thereafter, ions are implanted through the second surface into the semiconductor body. The ions are ions of a doping element, or ions, which induce doping by complex formation, or ions of a heavy metal. A surface region of the semiconductor body at the second surface is irradiated with a plurality of laser pulses. Thereafter, the carrier is removed from the semiconductor body.

Abstract: An insulated gate bipolar transistor (IGBT) is proposed. The IGBT includes a semiconductor body having a first surface and a second surface. The IGBT further includes an active area and an edge termination area that at least partly surrounds the active area. The active area includes a first part of an active IGBT area and a second part of the active IGBT area. The IGBT further includes a contact on the second surface of the semiconductor body. A minimum vertical distance between the contact in the first part of the active IGBT area and a reference level at the first surface is larger than a minimum vertical distance between the contact in the second part of the active IGBT area and the reference level at the first surface.

Abstract: A method of manufacturing a semiconductor device in a semiconductor body having a first surface and a second surface is proposed. The method includes implanting protons through the second surface into the semiconductor body. The method further includes implanting ions through the second surface into the semiconductor body. The ions are ions of a non-doping element having an atomic number of at least 9. Thereafter, the method further includes processing the semiconductor body by thermal annealing.

Abstract: A power semiconductor device includes a semiconductor body, having an active zone and a high voltage peripheral zone laterally adjacent to each other, the high voltage peripheral zone laterally surrounding the active zone. The device further includes a metallization layer on a front surface of the semiconductor body and connected to the active zone, a first barrier layer, comprising a high-melting metal or a high-melting alloy, between the active zone and the metallization layer, and a second barrier layer covering at least a part of the peripheral zone, the second barrier layer comprising an amorphous semi-isolating material. The first barrier layer and the second barrier layer partially overlap and form an overlap zone. The overlap zone extends over an entire circumference of the active zone. A method for producing such a power semiconductor device is also provided.

Abstract: A power semiconductor device includes a semiconductor body, having an active zone and a high voltage peripheral zone laterally adjacent to each other, the high voltage peripheral zone laterally surrounding the active zone. The device further includes a metallization layer on a front surface of the semiconductor body and connected to the active zone, a first barrier layer, comprising a high-melting metal or a high-melting alloy, between the active zone and the metallization layer, and a second barrier layer covering at least a part of the peripheral zone, the second barrier layer comprising an amorphous semi-isolating material. The first barrier layer and the second barrier layer partially overlap and form an overlap zone. The overlap zone extends over an entire circumference of the active zone. A method for producing such a power semiconductor device is also provided.