Patents by Inventor Daniel Schloegl

Daniel Schloegl has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12224317
    Abstract: A method of manufacturing a vertical power semiconductor device includes forming a drift region in a semiconductor body having a first main surface and a second main surface opposite to the first main surface along a vertical direction, the drift region including platinum atoms, and forming a field stop region in the semiconductor body between the drift region and the second main surface, the field stop region including a plurality of impurity peaks, wherein a first impurity peak of the plurality of impurity peaks is set a larger concentration than a second impurity peak of the plurality of impurity peaks, wherein the first impurity peak includes hydrogen and the second impurity peak includes helium.
    Type: Grant
    Filed: July 12, 2023
    Date of Patent: February 11, 2025
    Assignee: Infineon Technologies AG
    Inventors: Hans-Joachim Schulze, Christian Jaeger, Moriz Jelinek, Daniel Schloegl, Benedikt Stoib
  • Publication number: 20230352531
    Abstract: A method of manufacturing a vertical power semiconductor device includes forming a drift region in a semiconductor body having a first main surface and a second main surface opposite to the first main surface along a vertical direction, the drift region including platinum atoms, and forming a field stop region in the semiconductor body between the drift region and the second main surface, the field stop region including a plurality of impurity peaks, wherein a first impurity peak of the plurality of impurity peaks is set a larger concentration than a second impurity peak of the plurality of impurity peaks, wherein the first impurity peak includes hydrogen and the second impurity peak includes helium.
    Type: Application
    Filed: July 12, 2023
    Publication date: November 2, 2023
    Inventors: Hans-Joachim Schulze, Christian Jaeger, Moriz Jelinek, Daniel Schloegl, Benedikt Stoib
  • Patent number: 11742384
    Abstract: A vertical power semiconductor device is proposed. The vertical power semiconductor device includes a semiconductor body having a first main surface and a second main surface opposite to the first main surface along a vertical direction. The vertical power semiconductor device further includes a drift region in the semiconductor body. The drift region includes platinum atoms. The vertical power semiconductor device further includes a field stop region in the semiconductor body between the drift region and the second main surface. The field stop region includes a plurality of impurity peaks. A first impurity peak of the plurality of impurity peaks has a larger concentration than a second impurity peak of the plurality of impurity peaks. The first impurity peak includes hydrogen and the second impurity peak includes helium.
    Type: Grant
    Filed: March 30, 2021
    Date of Patent: August 29, 2023
    Assignee: Infineon Technologies AG
    Inventors: Hans-Joachim Schulze, Christian Jaeger, Moriz Jelinek, Daniel Schloegl, Benedikt Stoib
  • Patent number: 11569392
    Abstract: A power semiconductor diode includes a semiconductor body having first and second main surfaces opposite to each other along a vertical direction. A drift region of a second conductivity type is arranged between an anode region of a first conductivity type and the second main surface. A field stop region of the second conductivity type is arranged between the drift region and the second main surface. A dopant concentration profile of the field stop region along the vertical direction includes a maximum peak. An injection region of the first conductivity type is arranged between the field stop region and the second main surface, with a pn-junction between the injection and field stop regions. A cathode contact region of the second conductivity type is arranged between the field stop region and the second main surface. A first vertical distance between the pn-junction and the maximum peak ranges from 200 nm to 1500 nm.
    Type: Grant
    Filed: September 3, 2021
    Date of Patent: January 31, 2023
    Assignee: Infineon Technologies AG
    Inventors: Hans-Joachim Schulze, Christian Jaeger, Moriz Jelinek, Daniel Schloegl, Benedikt Stoib
  • Publication number: 20220406947
    Abstract: A semiconductor device includes: a drift region of a first conductivity type arranged between first and second surfaces of a semiconductor body; a first region of the first conductivity type at the second surface; a second region of a second conductivity type adjacent the first region at the second surface; a field stop region of the first conductivity type between the drift region and second surface; and a first electrode on the second surface directly adjacent to the first region in a first part of the second surface and to the second region in a second part of the second surface. The field stop region includes first and second sub-regions. Over a predominant portion of the first part of the second surface, the second sub-region directly adjoins the first region and includes dopants of the second conductivity type that partially compensate dopants of the first conductivity type.
    Type: Application
    Filed: June 13, 2022
    Publication date: December 22, 2022
    Inventors: Benedikt Stoib, Moriz Jelinek, Marten Mueller, Daniel Schloegl, Hans-Joachim Schulze, Holger Schulze
  • Publication number: 20220406600
    Abstract: A semiconductor device includes: an n-doped drift region between first and second surfaces of a semiconductor body; a p-doped first region at the second surface; and an n-doped field stop region between the drift and first region. The field stop region includes first and second sub-regions with hydrogen related donors. A p-n junction separates the first region and first sub-region. A concentration of the hydrogen related donors, along a first vertical extent of the first sub-region, steadily increases from the pn-junction to a maximum value, and steadily decreases from the maximum value to a reference value at a first transition between the sub-regions. A second vertical extent of the second sub-region ends at a second transition to the drift region where the concentration of hydrogen related donors equals 10% of the reference value. A maximum concentration value in the second sub-region is at most 20% larger than the reference value.
    Type: Application
    Filed: June 10, 2022
    Publication date: December 22, 2022
    Inventors: Moriz Jelinek, Thomas Waechtler, Bernd Bitnar, Daniel Schloegl, Hans-Joachim Schulze, Oana Julia Spulber, Benedikt Stoib, Christian Krueger
  • Publication number: 20220085215
    Abstract: A power semiconductor diode includes a semiconductor body having first and second main surfaces opposite to each other along a vertical direction. A drift region of a second conductivity type is arranged between an anode region of a first conductivity type and the second main surface. A field stop region of the second conductivity type is arranged between the drift region and the second main surface. A dopant concentration profile of the field stop region along the vertical direction includes a maximum peak. An injection region of the first conductivity type is arranged between the field stop region and the second main surface, with a pn-junction between the injection and field stop regions. A cathode contact region of the second conductivity type is arranged between the field stop region and the second main surface. A first vertical distance between the pn-junction and the maximum peak ranges from 200 nm to 1500 nm.
    Type: Application
    Filed: September 3, 2021
    Publication date: March 17, 2022
    Inventors: Hans-Joachim Schulze, Christian Jaeger, Moriz Jelinek, Daniel Schloegl, Benedikt Stoib
  • Publication number: 20210320174
    Abstract: A vertical power semiconductor device is proposed. The vertical power semiconductor device includes a semiconductor body having a first main surface and a second main surface opposite to the first main surface along a vertical direction. The vertical power semiconductor device further includes a drift region in the semiconductor body. The drift region includes platinum atoms. The vertical power semiconductor device further includes a field stop region in the semiconductor body between the drift region and the second main surface. The field stop region includes a plurality of impurity peaks. A first impurity peak of the plurality of impurity peaks has a larger concentration than a second impurity peak of the plurality of impurity peaks. The first impurity peak includes hydrogen and the second impurity peak includes helium.
    Type: Application
    Filed: March 30, 2021
    Publication date: October 14, 2021
    Inventors: Hans-Joachim Schulze, Christian Jaeger, Moriz Jelinek, Daniel Schloegl, Benedikt Stoib
  • Patent number: 10727311
    Abstract: A method for forming a power semiconductor device is provided. The method includes: providing a semiconductor wafer grown by a Czochralski process and having a first side; forming an n-type substrate doping layer in the semiconductor wafer at the first side, the substrate doping layer having a doping concentration of at least 1017/cm3; and forming an epitaxy layer on the first side of the semiconductor wafer after forming the n-type substrate doping layer.
    Type: Grant
    Filed: July 31, 2018
    Date of Patent: July 28, 2020
    Assignee: Infineon Technologies AG
    Inventors: Gerhard Schmidt, Johannes Konrad Baumgartl, Matthias Kuenle, Erwin Lercher, Daniel Schloegl
  • Patent number: 10665687
    Abstract: A method for processing a semiconductor device in accordance with various embodiments may include: depositing a first metallization material over a semiconductor body; performing a heating process so as to form at least one region in the semiconductor body including a eutectic of the first metallization material and material of the semiconductor body; and depositing a second metallization material over the semiconductor body so as to contact the semiconductor body via the at least one region in the semiconductor body.
    Type: Grant
    Filed: March 22, 2017
    Date of Patent: May 26, 2020
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: Hans-Joachim Schulze, Andreas Haertl, Francisco Javier Santos Rodriguez, André Rainer Stegner, Daniel Schloegl
  • Patent number: 10529809
    Abstract: A method of manufacturing a power semiconductor device includes: creating a doped contact region on top of a surface of a carrier; creating, on top of the contact region, a doped transition region having a maximum dopant concentration of at least 0.5*1015 cm?3 for at least 70% of a total extension of the doped transition region in an extension direction and a maximal dopant concentration gradient of at most 3*1022 cm?4, wherein a lower subregion of the doped transition region is in contact with the contact region and has a maximum dopant concentration at least 100 times higher than a maximum dopant concentration of an upper subregion of the doped transition region; and creating a doped drift region on top of the upper subregion of the doped transition region, the doped drift region having a lower dopant concentration than the upper subregion of the doped transition region.
    Type: Grant
    Filed: December 28, 2018
    Date of Patent: January 7, 2020
    Assignee: Infineon Technologies AG
    Inventors: Matthias Kuenle, Daniel Schloegl, Hans-Joachim Schulze, Christoph Weiss
  • Patent number: 10497801
    Abstract: A method of manufacturing a semiconductor device includes forming a profile of net doping in a drift zone of a semiconductor body by multiple irradiations with protons and generating hydrogen-related donors by annealing the semiconductor body. At least 50% of a vertical extension of the drift zone between first and second sides of the semiconductor body is undulated and includes multiple doping peak values between 1×1013 cm?3 and 5×1014 cm?3.
    Type: Grant
    Filed: January 25, 2019
    Date of Patent: December 3, 2019
    Assignee: Infineon Technologies AG
    Inventors: Elmar Falck, Andreas Haertl, Manfred Pfaffenlehner, Francisco Javier Santos Rodriguez, Daniel Schloegl, Hans-Joachim Schulze, Andre Stegner, Johannes Georg Laven
  • Publication number: 20190157401
    Abstract: A method of manufacturing a power semiconductor device includes: creating a doped contact region on top of a surface of a carrier; creating, on top of the contact region, a doped transition region having a maximum dopant concentration of at least 0.5*1015 cm?3 for at least 70% of a total extension of the doped transition region in an extension direction and a maximal dopant concentration gradient of at most 3*1022 cm?4, wherein a lower subregion of the doped transition region is in contact with the contact region and has a maximum dopant concentration at least 100 times higher than a maximum dopant concentration of an upper subregion of the doped transition region; and creating a doped drift region on top of the upper subregion of the doped transition region, the doped drift region having a lower dopant concentration than the upper subregion of the doped transition region.
    Type: Application
    Filed: December 28, 2018
    Publication date: May 23, 2019
    Inventors: Matthias Kuenle, Daniel Schloegl, Hans-Joachim Schulze, Christoph Weiss
  • Publication number: 20190157435
    Abstract: A method of manufacturing a semiconductor device includes forming a profile of net doping in a drift zone of a semiconductor body by multiple irradiations with protons and generating hydrogen-related donors by annealing the semiconductor body. At least 50% of a vertical extension of the drift zone between first and second sides of the semiconductor body is undulated and includes multiple doping peak values between 1×1013 cm?3 and 5×1014 cm?3.
    Type: Application
    Filed: January 25, 2019
    Publication date: May 23, 2019
    Inventors: Elmar Falck, Andreas Haertl, Manfred Pfaffenlehner, Francisco Javier Santos Rodriguez, Daniel Schloegl, Hans-Joachim Schulze, Andre Stegner, Johannes Georg Laven
  • Patent number: 10276656
    Abstract: Epitaxy troughs are formed in a semiconductor substrate, wherein a matrix section of the semiconductor substrate laterally separates the epitaxy troughs and comprises a first semiconductor material. Crystalline epitaxy regions of a second semiconductor material are formed in the epitaxy troughs, wherein the second semiconductor material differs from the first semiconductor material in at least one of porosity, impurity content or defect density. From the epitaxy regions at least main body portions of semiconductor bodies of the semiconductor devices are formed.
    Type: Grant
    Filed: January 31, 2018
    Date of Patent: April 30, 2019
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: Frank Hille, Andre Brockmeier, Francisco Javier Santos Rodriguez, Daniel Schloegl, Hans-Joachim Schulze
  • Patent number: 10243066
    Abstract: A method of producing a semiconductor device is presented. The method comprises: providing a semiconductor substrate having a surface; epitaxially growing, along a vertical direction (Z) perpendicular to the surface, a back side emitter layer on top of the surface, wherein the back side emitter layer has dopants of a first conductivity type or dopants of a second conductivity type complementary to the first conductivity type; epitaxially growing, along the vertical direction (Z), a drift layer having dopants of the first conductivity type above the back side emitter layer, wherein a dopant concentration of the back side emitter layer is higher than a dopant concentration of the drift layer; and creating, either within or on top of the drift layer, a body region having dopants of the second conductivity type, a transition between the body region and the drift layer forming a pn-junction (Zpn).
    Type: Grant
    Filed: May 8, 2017
    Date of Patent: March 26, 2019
    Assignee: INFINEON TECHNOLOGIES AUSTRIA AG
    Inventors: Daniel Schloegl, Johannes Baumgartl, Matthias Kuenle, Erwin Lercher, Hans-Joachim Schulze, Christoph Weiss
  • Patent number: 10211325
    Abstract: A semiconductor device includes a semiconductor body having opposite first and second sides. The semiconductor device further includes a drift zone in the semiconductor body between the second side and a pn junction. A profile of net doping of the drift zone along at least 50% of a vertical extension of the drift zone between the first and second sides is undulated and includes doping peak values between 1×1013 cm?3 and 5×1014 cm?3. A device blocking voltage Vbr is defined by a breakdown voltage of the pn junction between the drift zone and a semiconductor region of opposite conductivity type that is electrically coupled to the first side of the semiconductor body.
    Type: Grant
    Filed: January 28, 2014
    Date of Patent: February 19, 2019
    Assignee: Infineon Technologies AG
    Inventors: Elmar Falck, Andreas Haertl, Manfred Pfaffenlehner, Francisco Javier Santos Rodriguez, Daniel Schloegl, Hans-Joachim Schulze, Andre Stegner, Johannes Georg Laven
  • Publication number: 20190035909
    Abstract: A method for forming a power semiconductor device is provided. The method includes: providing a semiconductor wafer grown by a Czochralski process and having a first side; forming an n-type substrate doping layer in the semiconductor wafer at the first side, the substrate doping layer having a doping concentration of at least 1017/cm3; and forming an epitaxy layer on the first side of the semiconductor wafer after forming the n-type substrate doping layer.
    Type: Application
    Filed: July 31, 2018
    Publication date: January 31, 2019
    Inventors: Gerhard Schmidt, Johannes Baumgartl, Matthias Kuenle, Erwin Lercher, Daniel Schloegl
  • Patent number: 10186587
    Abstract: A power semiconductor device has a semiconductor body configured to conduct a load current in parallel to an extension direction between first and second load terminals of the power semiconductor device. The semiconductor body includes a doped contact region electrically connected to the second load terminal, a doped drift region having a dopant concentration that is smaller than a dopant concentration of the contact region, and an epitaxially grown doped transition region separated from the second load terminal by the contact region and that couples the contact region to the drift region. An upper subregion of the transition region is in contact with the drift region, and a lower subregion of the transition region is in contact with the contact region. The transition region has a dopant concentration of at least 0.5*1015 cm?3 for at least 5% of the total extension of the transition region in the extension direction.
    Type: Grant
    Filed: June 27, 2017
    Date of Patent: January 22, 2019
    Assignee: Infineon Technologies AG
    Inventors: Matthias Kuenle, Daniel Schloegl, Hans-Joachim Schulze, Christoph Weiss
  • Publication number: 20180226471
    Abstract: Epitaxy troughs are formed in a semiconductor substrate, wherein a matrix section of the semiconductor substrate laterally separates the epitaxy troughs and comprises a first semiconductor material. Crystalline epitaxy regions of a second semiconductor material are formed in the epitaxy troughs, wherein the second semiconductor material differs from the first semiconductor material in at least one of porosity, impurity content or defect density. From the epitaxy regions at least main body portions of semiconductor bodies of the semiconductor devices are formed.
    Type: Application
    Filed: January 31, 2018
    Publication date: August 9, 2018
    Inventors: Frank Hille, Andre Brockmeier, Francisco Javier Santos Rodriguez, Daniel Schloegl, Hans-Joachim Schulze