Patents by Inventor Daniel So

Daniel So has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230040045
    Abstract: Detection of viral nucleic acids (NAs) and their variants is effected using nanopore technology. If the target wild type viral NA is single-stranded, it is mixed with its complementary NA, and also the unknown viral NA sample to be analyzed, followed by hybridization; while if the target wild type viral NA is double-stranded, it is mixed with the unknown viral NA sample only, then denatured and followed by hybridization. The hybridized products from either case are then subjected to translocation in the form of a translocation analysis, experiment or test through a nanopore device that measures the electrical signals induced through translocation events. The corresponding signal train is characteristic of an individual virus or variant and acts as a “fingerprint” facilitating rapid virus identification and discovery of a new variant.
    Type: Application
    Filed: August 4, 2022
    Publication date: February 9, 2023
    Inventors: Ka-Wai WONG, Xu CAO, Jie Lexi REN, Wai-cheong Daniel SO
  • Patent number: 7067394
    Abstract: Fabrication techniques for fabricating p-i-n structures that achieve a thin intrinsic layer and a small resistance across the p-i-n structure and thus a high response speed in a monolithically integrated circuit package. Germanium p-i-n structures may be fabricated over silicon or silicon-on-insulator substrates using silicon processing technologies.
    Type: Grant
    Filed: February 25, 2004
    Date of Patent: June 27, 2006
    Assignee: Intel Corporation
    Inventor: Daniel So
  • Publication number: 20050186759
    Abstract: Fabrication techniques for fabricating p-i-n structures that achieve a thin intrinsic layer and a small resistance across the p-i-n structure and thus a high response speed in a monolithically integrated circuit package. Germanium p-i-n structures may be fabricated over silicon or silicon-on-insulator substrates using silicon processing technologies.
    Type: Application
    Filed: February 25, 2004
    Publication date: August 25, 2005
    Inventor: Daniel So