Abstract: A 3 state BiCMOS output buffer (100) with power down capability has been provided. The buffer includes an input stage (102), responsive to an input signal, an output coupled to both a pull-up driver (114), and an output pull-down driver (116) wherein the drivers provide an output signal at an output of the buffer in response to the input signal. Additionally, the buffer includes a power down sense circuit (108), coupled to a power supply node (118), for turning off an output pull-up transistor (214) when the power supply node is powered down and thus eliminating leakage paths within the buffer. The buffer also includes a noise limiting circuit (112) for slowing down a high to low transition at the output of the buffer thereby reducing the switching noise of the buffer while not affecting the overall speed of the buffer.

Abstract: The present invention includes a circuit having an input section that is operated from an operating voltage which is lower than a supply voltage of the circuit. The operating voltage is established so that the operating voltage minus the voltage of a high level TTL signal is less than an upper level threshold voltage of the input section. The circuit couples the output of the input section to the supply voltage thereby increasing the voltage on the output of the input section to a voltage greater than the operating voltage. In addition, the circuit enables a current source during a portion of a low-to-high transition on an output of the circuit. The current source provides high current drive during the portion of the transition. Since the current source is only enabled during the portion of the transition, static power dissipation is minimized.