Patents by Inventor Daniel Thomas Riedler

Daniel Thomas Riedler has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250238209
    Abstract: A method for executing a program includes writing a program value to a corresponding accelerator program register of accelerator program registers of an accelerator circuit according to accelerator program difference information of a compiled program. The method includes executing an accelerator program by the accelerator circuit according to program values of the accelerator program registers of the accelerator circuit. In an embodiment of the method, the compiled program corresponds to a machine learning model. The machine learning model has at least one layer and an embodiment of the method further includes searching metadata of the compiled program for compiled data associated with each layer of the machine learning model. The accelerator program difference information may be included in the metadata of the compiled program.
    Type: Application
    Filed: January 24, 2024
    Publication date: July 24, 2025
    Inventors: Daniel Thomas Riedler, Matthew Brandon Gately
  • Patent number: 12153542
    Abstract: An apparatus includes an array processor to process array data in response to information contained in a packet, wherein the packet comprises a set of fields specifying configuration information for processing the array.
    Type: Grant
    Filed: June 28, 2021
    Date of Patent: November 26, 2024
    Assignee: Silicon Laboratories Inc.
    Inventors: Matthew Brandon Gately, Eric Jonathan Deal, Daniel Thomas Riedler
  • Patent number: 12153921
    Abstract: An apparatus includes an array processor to process array data in response to a set of macro-instructions. A macro-instruction in the set of macro-instructions performs loop operations, array iteration operations, and/or arithmetic logic unit (ALU) operations.
    Type: Grant
    Filed: June 28, 2021
    Date of Patent: November 26, 2024
    Assignee: Silicon Laboratories Inc.
    Inventors: Matthew Brandon Gately, Eric Jonathan Deal, Mark Willard Johnson, Daniel Thomas Riedler
  • Publication number: 20220413850
    Abstract: An apparatus includes an array processor to process array data in response to a set of macro-instructions. A macro-instruction in the set of macro-instructions performs loop operations, array iteration operations, and/or arithmetic logic unit (ALU) operations.
    Type: Application
    Filed: June 28, 2021
    Publication date: December 29, 2022
    Inventors: Matthew Brandon Gately, Eric Jonathan Deal, Mark Willard Johnson, Daniel Thomas Riedler
  • Publication number: 20220414051
    Abstract: An apparatus includes an array processor to process array data in response to information contained in a packet, wherein the packet comprises a set of fields specifying configuration information for processing the array.
    Type: Application
    Filed: June 28, 2021
    Publication date: December 29, 2022
    Inventors: Matthew Brandon Gately, Eric Jonathan Deal, Daniel Thomas Riedler