Patents by Inventor Daniel Toet

Daniel Toet has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11903302
    Abstract: Systems and methods for depositing materials on a substrate via OVJP are provided. A float table and grippers are used to move and position the substrate relative to one or more OVJP print bars to reduce the chance of damaging or compromising the substrate or prior depositions.
    Type: Grant
    Filed: December 13, 2021
    Date of Patent: February 13, 2024
    Assignee: Universal Display Corporation
    Inventors: Kent Khuong Nguyen, Sriram Krishnaswami, Daniel Toet, Jeff Hawthorne, William E. Quinn
  • Publication number: 20230357918
    Abstract: Methods, systems, and devices are provided for organic vapor jet deposition (OVJP), which require significantly fewer print heads than conventional OVJP deposition systems. The disclosed OVJP systems include half the number of OVJP print heads than a conventional system, or less, and provide for relative movement of the substrate and print heads to allow for rapid and comprehensive material deposition over the full surface of the substrate.
    Type: Application
    Filed: May 3, 2023
    Publication date: November 9, 2023
    Inventors: Jeff HAWTHORNE, William E. QUINN, Kent Khuong NGUYEN, Sriram KRISHNASWAMI, Gregory McGRAW, Daniel TOET
  • Publication number: 20230363244
    Abstract: An organic vapor jet printing (OVJP) device is provided that includes an OVJP print die having one or more delivery channels to deliver organic material and carrier gas to a region below the print die and one or more exhaust channels to remove material from below the print die. A directly-heated delivery line connected to the one or more delivery channels and a source of the organic material external to the OVJP print die includes a resistive material and a plurality of electrical connections to the resistive material. When a current is applied to the resistive material via the plurality of electrical connections, the resistive material heats the interior of the directly-heated delivery line.
    Type: Application
    Filed: May 3, 2023
    Publication date: November 9, 2023
    Inventors: Steven Shigeki AOCHI, Vadim BOGUSLAVSKIY, Evan HERNANDEZ, Kent Khuong NGUYEN, Michael FILIPPI, Matthew KING, Daniel TOET
  • Publication number: 20220190245
    Abstract: Systems and methods for depositing materials on a substrate via OVJP are provided. A float table and grippers are used to move and position the substrate relative to one or more OVJP print bars to reduce the chance of damaging or compromising the substrate or prior depositions.
    Type: Application
    Filed: December 13, 2021
    Publication date: June 16, 2022
    Inventors: Kent Khuong NGUYEN, Sriram KRISHNASWAMI, Daniel TOET, Jeff HAWTHORNE, William E. QUINN
  • Publication number: 20170294291
    Abstract: An electron-beam induced plasma is utilized to establish a non-mechanical, electrical contact to a device of interest. This plasma source may be referred to as atmospheric plasma source and may be configured to provide a plasma column of very fine diameter and controllable characteristics. The plasma column traverses the atmospheric space between the plasma source into the atmosphere and the device of interest and acts as an electrical path to the device of interest in such a way that a characteristic electrical signal can be collected from the device. Additionally, by controlling the gases flowing into the plasma column the probe may be used for surface modification, etching and deposition.
    Type: Application
    Filed: September 17, 2015
    Publication date: October 12, 2017
    Inventors: Nedal SALEH, Unit B STERLING, Daniel TOET, Arie GLAZER, Ronen LOEWINGER, Sriram KRISHNASWAMI
  • Patent number: 9523714
    Abstract: A non-mechanical contact signal measurement apparatus includes a first conductor on a structure under test and a gas in contact with the first conductor. At least one electron beam is directed into the gas so as to induce a plasma in the gas where the electron beam passes through the gas. A second conductor is in electrical contact with the plasma. A signal source is coupled to an electrical measurement device through the first conductor, the plasma, and the second conductor when the plasma is directed on the first conductor. The electrical measurement device is responsive to the signal source.
    Type: Grant
    Filed: January 15, 2014
    Date of Patent: December 20, 2016
    Assignees: PHOTON DYNAMICS, INC., ORBOTECH LTD.
    Inventors: Alexander Kadyshevitch, Ofer Kadar, Arie Glazer, Ronen Loewinger, Abraham Gross, Daniel Toet
  • Publication number: 20160299103
    Abstract: An electron-beam induced plasmas is utilized to establish a non-mechanical, electrical contact to a device of interest. This plasma source may be referred to as atmospheric plasma source and may be configured to provide a plasma column of very fine diameter and controllable characteristics. The plasma column traverses the atmospheric space between the plasma source into the atmosphere and the device of interest and acts as an electrical path to the device of interest in such a way that a characteristic electrical signal can be collected from the device. Additionally, by controlling the gases flowing into the plasma column the probe may be used for surface modification, etching and deposition.
    Type: Application
    Filed: October 2, 2014
    Publication date: October 13, 2016
    Inventors: Nedal Saleh, Daniel Toet, Enrique Sterling, Ronen Loewinger, Sriram Krishnaswami, Arie Glazer
  • Publication number: 20150097592
    Abstract: A method of testing a flat panel display including an array of pixels and a peripheral circuit configured to provide signals to the pixels is disclosed. The method includes applying at least one test signal to the peripheral circuit, acquiring one or more voltage images of the peripheral circuit, and detecting a defect in the peripheral circuit based on the acquired voltage images.
    Type: Application
    Filed: October 7, 2014
    Publication date: April 9, 2015
    Inventors: Chang Hee Lee, James Lee, Sung Jin Kim, Jongho Lee, Michael Sean Cassady, Nikolay Mokichev, Kent Nguyen, Daniel Toet
  • Publication number: 20140132299
    Abstract: A non-mechanical contact signal measurement apparatus includes a first conductor on a structure under test and a gas in contact with the first conductor. At least one electron beam is directed into the gas so as to induce a plasma in the gas where the electron beam passes through the gas. A second conductor is in electrical contact with the plasma. A signal source is coupled to an electrical measurement device through the first conductor, the plasma, and the second conductor when the plasma is directed on the first conductor. The electrical measurement device is responsive to the signal source.
    Type: Application
    Filed: January 15, 2014
    Publication date: May 15, 2014
    Applicant: Photon Dynamics, Inc.
    Inventors: Alexander Kadyshevitch, Ofer Kadar, Arie Glazer, Ronen Loewinger, Abraham Gross, Daniel Toet
  • Patent number: 7468611
    Abstract: A system performs continuous full linear scan of a flat media. The system includes, in part, a chuck, and at least first, second and third gantries. The chuck is adapted to support the flat media during the test. The first gantry includes at least one linear array of non-contacting sensors that spans the width of the flat media and is adapted to move across an entire length of the flat media. Each of the second and third gantries includes a probe head that spans the width of the flat media and each is adapted to apply an electrical signal to the flat media. Each probe head is further adapted to move along a direction substantially perpendicular to the surface of the flat media during the times when the first gantry is in motion and while test signals are being continuously applied.
    Type: Grant
    Filed: October 19, 2007
    Date of Patent: December 23, 2008
    Assignee: Photon Dynamics, Inc.
    Inventors: Kent Nguyen, Eric Thompson, Hai Tran, Kaushal Gangakhedkar, Robert Barnett, Daniel Toet, David Baldwin, Steve Aochi, Neil Nguyen
  • Publication number: 20080094081
    Abstract: A system performs continuous full linear scan of a flat media. The system includes, in part, a chuck, and at least first, second and third gantries. The chuck is adapted to support the flat media during the test. The first gantry includes at least one linear array of non-contacting sensors that spans the width of the flat media and is adapted to move across an entire length of the flat media. Each of the second and third gantries includes a probe head that spans the width of the flat media and each is adapted to apply an electrical signal to the flat media. Each probe head is further adapted to move along a direction substantially perpendicular to the surface of the flat media during the times when the first gantry is in motion and while test signals are being continuously applied.
    Type: Application
    Filed: October 19, 2007
    Publication date: April 24, 2008
    Applicant: Photon Dynamics, Inc.
    Inventors: Kent Nguyen, Eric Thompson, Hai Tran, Kaushal Gangakhedkar, Robert Barnett, Daniel Toet, David Baldwin, Steve Aochi, Neil Nguyen
  • Patent number: 6933530
    Abstract: A process for direct integration of a thin-film silicon p-n junction diode with a magnetic tunnel junction for use in advanced magnetic random access memory (MRAM) cells for high performance, non-volatile memory arrays. The process is based on pulsed laser processing for the fabrication of vertical polycrystalline silicon electronic device structures, in particular p-n junction diodes, on films of metals deposited onto low temperature-substrates such as ceramics, dielectrics, glass, or polymers. The process preserves underlayers and structures onto which the devices are typically deposited, such as silicon integrated circuits. The process involves the low temperature deposition of at least one layer of silicon, either in an amorphous or a polycrystalline phase on a metal layer. Dopants may be introduced in the silicon film during or after deposition.
    Type: Grant
    Filed: September 17, 2004
    Date of Patent: August 23, 2005
    Assignee: The Regents of the University of California
    Inventors: Daniel Toet, Thomas W. Sigmon
  • Publication number: 20050083729
    Abstract: A process for direct integration of a thin-film silicon p-n junction diode with a magnetic tunnel junction for use in advanced magnetic random access memory (MRAM) cells for high performance, non-volatile memory arrays. The process is based on pulsed laser processing for the fabrication of vertical polycrystalline silicon electronic device structures, in particular p-n junction diodes, on films of metals deposited onto low temperature-substrates such as ceramics, dielectrics, glass, or polymers. The process preserves underlayers and structures onto which the devices are typically deposited, such as silicon integrated circuits. The process involves the low temperature deposition of at least one layer of silicon, either in an amorphous or a polycrystalline phase on a metal layer. Dopants may be introduced in the silicon film during or after deposition.
    Type: Application
    Filed: September 17, 2004
    Publication date: April 21, 2005
    Inventors: Daniel Toet, Thomas Sigmon
  • Patent number: 6828180
    Abstract: A process for direct integration of a thin-film silicon p-n junction diode with a magnetic tunnel junction for use in advanced magnetic random access memory (MRAM) cells for high performance, non-volatile memory arrays. The process is based on pulsed laser processing for the fabrication of vertical polycrystalline silicon electronic device structures, in particular p-n junction diodes, on films of metals deposited onto low temperature-substrates such as ceramics, dielectrics, glass, or polymers. The process preserves underlayers and structures onto which the devices are typically deposited, such as silicon integrated circuits. The process involves the low temperature deposition of at least one layer of silicon, either in an amorphous or a polycrystalline phase on a metal layer. Dopants may be introduced in the silicon film during or after deposition.
    Type: Grant
    Filed: September 27, 2002
    Date of Patent: December 7, 2004
    Assignee: The Regents of the University of California
    Inventors: Daniel Toet, Thomas W. Sigmon
  • Patent number: 6541316
    Abstract: A process for direct integration of a thin-film silicon p-n junction diode with a magnetic tunnel junction for use in advanced magnetic random access memory (MRAM) cells for high performance, non-volatile memory arrays. The process is based on pulsed laser processing for the fabrication of vertical polycrystalline silicon electronic device structures, in particular p-n junction diodes, on films of metals deposited onto low temperature-substrates such as ceramics, dielectrics, glass, or polymers. The process preserves underlayers and structures onto which the devices are typically deposited, such as silicon integrated circuits. The process involves the low temperature deposition of at least one layer of silicon, either in an amorphous or a polycrystalline phase on a metal layer. Dopants may be introduced in the silicon film during or after deposition.
    Type: Grant
    Filed: December 22, 2000
    Date of Patent: April 1, 2003
    Assignee: The Regents of the University of California
    Inventors: Daniel Toet, Thomas W. Sigmon
  • Publication number: 20030036238
    Abstract: A process for direct integration of a thin-film silicon p-n junction diode with a magnetic tunnel junction for use in advanced magnetic random access memory (MRAM) cells for high performance, non-volatile memory arrays. The process is based on pulsed laser processing for the fabrication of vertical polycrystalline silicon electronic device structures, in particular p-n junction diodes, on films of metals deposited onto low temperature-substrates such as ceramics, dielectrics, glass, or polymers. The process preserves underlayers and structures onto which the devices are typically deposited, such as silicon integrated circuits. The process involves the low temperature deposition of at least one layer of silicon, either in an amorphous or a polycrystalline phase on a metal layer. Dopants may be introduced in the silicon film during or after deposition.
    Type: Application
    Filed: September 27, 2002
    Publication date: February 20, 2003
    Applicant: The Regents of the University of California
    Inventors: Daniel Toet, Thomas W. Sigmon
  • Publication number: 20020081786
    Abstract: A process for direct integration of a thin-film silicon p-n junction diode with a magnetic tunnel junction for use in advanced magnetic random access memory (MRAM) cells for high performance, non-volatile memory arrays. The process is based on pulsed laser processing for the fabrication of vertical polycrystalline silicon electronic device structures, in particular p-n junction diodes, on films of metals deposited onto low temperature-substrates such as ceramics, dielectrics, glass, or polymers. The process preserves underlayers and structures onto which the devices are typically deposited, such as silicon integrated circuits. The process involves the low temperature deposition of at least one layer of silicon, either in an amorphous or a polycrystalline phase on a metal layer. Dopants may be introduced in the silicon film during or after deposition.
    Type: Application
    Filed: December 22, 2000
    Publication date: June 27, 2002
    Applicant: The Regents of the University of California
    Inventors: Daniel Toet, Thomas W. Sigmon