Patents by Inventor Daniel V. Zilavy
Daniel V. Zilavy has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7757012Abstract: Techniques are disclosed for enabling a single computer system to execute both operating systems that permit multiple devices to be mapped to a single PCI function and operating systems that do not permit such mapping. Prior to loading and executing an operating system (e.g., during system reset), the computer system determines whether the operating system supports mapping of multiple devices to a single function. If such mapping is supported, the computer system maps multiple devices on a single PCI card to a single function in the PCI configuration space for the card. If such mapping is not supported, the computer system maps each device to a separate PCI function. The computer system then loads and executes the operating system. The operating system is thereby enabled to access all devices on the bus according to the particular device-function mapping scheme supported by the operating system.Type: GrantFiled: February 3, 2006Date of Patent: July 13, 2010Assignee: Hewlett-Packard Development Company, L.P.Inventor: Daniel V. Zilavy
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Patent number: 7746883Abstract: Systems, methodologies, media, computing devices, network adapters, and other embodiments associated with network communications are described. One exemplary system embodiment includes a multi-drop Ethernet network.Type: GrantFiled: March 1, 2005Date of Patent: June 29, 2010Assignee: Hewlett-Packard Development Company, L.P.Inventors: Michael J. Erickson, Daniel V. Zilavy, Edward A. Cross
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Patent number: 7739438Abstract: A method for interrupt priority encoding and vectoring begins with reading pending interrupt bits from an interrupt status register. An entry in a table is located using the pending interrupt bits. The table has a plurality of vector entries for at least one high priority interrupt bit, and a single entry for at least one low priority interrupt bit. A vector address is fetched from the table and a branch is performed to the vector address. An alternate embodiment has high and low priority interrupt vector tables, where the high low priority interrupt vector table is used if no high priority interrupt is present.Type: GrantFiled: February 12, 2003Date of Patent: June 15, 2010Assignee: Hewlett-Packard Development Company, L.P.Inventor: Daniel V. Zilavy
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Patent number: 7730476Abstract: In a computer system including a first field-programmable unit including first field-programmable unit (FPU) code, computer-implemented techniques are disclosed for determining whether the first FPU code is compatible with the computer system and, if the first FPU code is determined not to be compatible with the computer system, notifying a user of the computer system of the incompatibility.Type: GrantFiled: July 1, 2003Date of Patent: June 1, 2010Assignee: Hewlett-Packard Development Company, L.P.Inventor: Daniel V. Zilavy
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Patent number: 7725892Abstract: A method for use in a computer system includes a first revision compatibility descriptor identifying a first plurality of compatible combinations of field-programmable unit codes. The method includes steps of: (A) determining whether the first revision compatibility descriptor identifies first field-programmable unit code for use in a first field-programmable unit as being compatible with the computer system; and (B) if the first revision compatibility descriptor does not identify the first field-programmable unit code as being compatible with the computer system, performing a step of updating the first revision compatibility descriptor to identify the first field-programmable unit code as being compatible with the computer system.Type: GrantFiled: July 1, 2003Date of Patent: May 25, 2010Assignee: Hewlett-Packard Development Company, L.P.Inventors: Daniel V. Zilavy, Gerald J. Kaufman, Jr., Edward A. Cross
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Patent number: 7370157Abstract: Systems and methods of sharing removable media storage (RMS) devices in multi-partitioned systems are disclosed. An exemplary method may include receiving requests from a plurality of partitions of a processor to map at least one shared RMS device for the multi-partitioned system. The method may also include scheduling the requests if the shared RMS device is unavailable. The method may also include automatically mapping the at least one shared RMS device to the partitions one at a time as the at least one shared RMS device becomes available.Type: GrantFiled: May 24, 2005Date of Patent: May 6, 2008Assignee: Hewlett-Packard Development Company, L.P.Inventors: Daniel V. Zilavy, Edward A. Cross
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Patent number: 7089413Abstract: Techniques are disclosed for resetting agents in a computer system without requiring the computer system, or partitions thereof, to be reset. In one embodiment, each agent in the system is associated with a corresponding partition. A reset signal directed to an agent is redirected to a reset type selector which determines whether the partition associated with the agent is in a run state (an “unsafe run state”) in which resetting the agent will cause the partition to crash. If the partition is in an unsafe run state, a soft reset is performed on the agent. Otherwise, a hard reset is performed on the agent. If performing a soft reset does not solve the problem that was the impetus for the reset signal, the partition may be brought into a safe run state before performing a hard reset on it.Type: GrantFiled: March 5, 2003Date of Patent: August 8, 2006Assignee: Hewlett-Packard Development Company, L.P.Inventors: Michael John Erickson, David L. Tharp, Daniel V. Zilavy
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Patent number: 7036035Abstract: A system and method for power management in a computer system having multiple power grids is disclosed. The system includes a service structure operable in conjunction with an operating system (OS) instance executed on the computer system. At least one uninterrupted power supply (UPS) and at least one alternative source of power provide power to the multiple power grids. Where an UPS sends a loss of power notification to the service structure, the service structure is operable to maintain power supply to the grids from an available alternative source of power.Type: GrantFiled: August 15, 2002Date of Patent: April 25, 2006Assignee: Hewlett-Packard Development Company, L.P.Inventors: Michael Allison, Bradley D. Winick, Daniel V. Zilavy, Edward A. Cross, Phillip David Langley, James E. Mankovich
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Patent number: 7003591Abstract: Techniques are disclosed for enabling a single computer system to execute both operating systems that permit multiple devices to be mapped to a single PCI function and operating systems that do not permit such mapping. Prior to loading and executing an operating system (e.g., during system reset), the computer system determines whether the operating system supports mapping of multiple devices to a single function. If such mapping is supported, the computer system maps multiple devices on a single PCI card to a single function in the PCI configuration space for the card. If such mapping is not supported, the computer system maps each device to a separate PCI function. The computer system then loads and executes the operating system. The operating system is thereby enabled to access all devices on the bus according to the particular device-function mapping scheme supported by the operating system.Type: GrantFiled: August 20, 2003Date of Patent: February 21, 2006Assignee: Hewlett-Packard Development Company, L.P.Inventor: Daniel V. Zilavy
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Patent number: 6807596Abstract: A system for removal and replacement of core I/O devices while the rest of the computer system is powered-up and operational. The system comprises a custom form-factor core I/O card that contains a plurality of I/O devices, including a processor for managing the card's I/O functions. A command is sent to an operating system, running on a system processor external to the core I/O card, that notifies the system to stop using, and de-configure, the hardware on the core I/O card. Once the OS receives this notification, an indication that the card is ready to be removed is sent to the user. The user then removes the card from its slot and inserts a replacement card into the same slot. The system software then discovers the I/O components on the core I/O card to determine what components are available, and then configures the new I/O device(s).Type: GrantFiled: July 26, 2001Date of Patent: October 19, 2004Assignee: Hewlett-Packard Development Company, L.P.Inventors: Michael John Erickson, Daniel V. Zilavy, Bradley D. Winick, Paul J. Mantey
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Publication number: 20040177242Abstract: Techniques are disclosed for resetting agents in a computer system without requiring the computer system, or partitions thereof, to be reset. In one embodiment, each agent in the system is associated with a corresponding partition. A reset signal directed to an agent is redirected to a reset type selector which determines whether the partition associated with the agent is in a run state (an “unsafe run state”) in which resetting the agent will cause the partition to crash. If the partition is in an unsafe run state, a soft reset is performed on the agent. Otherwise, a hard reset is performed on the agent. If performing a soft reset does not solve the problem that was the impetus for the reset signal, the partition may be brought into a safe run state before performing a hard reset on it.Type: ApplicationFiled: March 5, 2003Publication date: September 9, 2004Inventors: Michael John Erickson, David L. Tharp, Daniel V. Zilavy
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Publication number: 20040158664Abstract: A method for interrupt priority encoding and vectoring begins with reading pending interrupt bits from an interrupt status register. An entry in a table is located using the pending interrupt bits. The table has a plurality of vector entries for at least one high priority interrupt bit, and a single entry for at least one low priority interrupt bit. A vector address is fetched from the table and a branch is performed to the vector address. An alternate embodiment has high and low priority interrupt vector tables, where the high low priority interrupt vector table is used if no high priority interrupt is present.Type: ApplicationFiled: February 12, 2003Publication date: August 12, 2004Inventor: Daniel V. Zilavy
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Publication number: 20040032168Abstract: A system and method for power management in a computer system having multiple power grids is disclosed. The system includes a service structure operable in conjunction with an operating system (OS) instance executed on the computer system. At least one uninterrupted power supply (UPS) and at least one alternative source of power provide power to the multiple power grids. Where an UPS sends a loss of power notification to the service structure, the service structure is operable to maintain power supply to the grids from an available alternative source of power.Type: ApplicationFiled: August 15, 2002Publication date: February 19, 2004Inventors: Michael Allison, Bradley D. Winick, Daniel V. Zilavy, Edward A. Cross, Phillip David Langley, James E. Mankovich
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Publication number: 20030023801Abstract: A system for removal and replacement of core I/O devices while the rest of the computer system is powered-up and operational. The system comprises a custom form-factor core I/O card that contains a plurality of I/O devices, including a processor for managing the card's I/O functions. A command is sent to an operating system, running on a system processor external to the core I/O card, that notifies the system to stop using, and de-configure, the hardware on the core I/O card. Once the OS receives this notification, an indication that the card is ready to be removed is sent to the user. The user then removes the card from its slot and inserts a replacement card into the same slot. The system software then discovers the I/O components on the core I/O card to determine what components are available, and then configures the new I/O device(s).Type: ApplicationFiled: July 26, 2001Publication date: January 30, 2003Inventors: Michael John Erickson, Daniel V. Zilavy, Bradley D. Winick, Paul J. Mantey
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Patent number: 6487624Abstract: A method and apparatus for hot swapping and bus extension without data corruption. During the hot swapping of a circuit board in a bus, the bus is extended onto or retracted from the circuit board in a manner which does not corrupt the data on the bus. The extension or retraction of the bus is detected and a bus reset is asserted interrupting and preventing transactions on the bus. The bus reset is asserted for a minimum amount of time to allow the bus to stabilize after the hot swap. A bus extension/retraction detection component and a bus reset component perform these functions.Type: GrantFiled: August 13, 1999Date of Patent: November 26, 2002Assignee: Hewlett-Packard CompanyInventors: Michael John Erickson, Daniel V. Zilavy
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Publication number: 20020161975Abstract: A data storage apparatus comprises a plurality of computer processors, each having an internal memory, and a plurality of unshared “clean data present” indicators connected to the plurality of computer processors. Each of the plurality of unshared “clean data present” indicators corresponds to one of the plurality of computer processors. Each of the plurality of computer processors is adapted to assert its corresponding unshared “clean data present” indicator when requested data is contained in its internal memory in an unmodified state.Type: ApplicationFiled: February 23, 2001Publication date: October 31, 2002Inventor: Daniel V. Zilavy
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Patent number: 6408343Abstract: A device and method for a peripheral adapter of a dual SCSI bus enclosure is described. An adapter can operate alone or in pairs to provide different modes of operation, including simplex, duplex, and cluster. When used in pairs, two adapters interconnect internally to the enclosure through internal cross-coupling bus repeaters that can be selectively enabled or disabled. The adapters are hot-swappable and have the ability to automatically self configure. In the cluster mode, the adapter supports failover capability from a master adapter to a redundant adapter.Type: GrantFiled: March 29, 1999Date of Patent: June 18, 2002Assignee: Hewlett-Packard CompanyInventors: Michael J. Erickson, Daniel V. Zilavy, Glenn W. Strunk
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Patent number: 6378084Abstract: A device and method for enclosure processing of a dual SCSI bus enclosure is described. A single SCSI enclosure processor is provided on an adapter that can operate alone or in pairs to provide different modes of operation, including simplex, duplex, and cluster. When used in pairs, two adapters interconnect internally to the enclosure through internal cross-coupling bus repeaters. The adapters have the ability to automatically configure themselves. In the cluster mode, a first enclosure processor on a first adapter assumes an active status, while a second enclosure processor on a second adapter waits in a standby mode. The standby enclosure processor detects when the active enclosure processor has failed, misoperated, or been removed and automatically failsover, assuming the identity of the active enclosure processor, without disruption to the system. Hot-swapping of the adapter boards is therefore possible.Type: GrantFiled: March 29, 1999Date of Patent: April 23, 2002Assignee: Hewlett-Packard CompanyInventors: Glenn W. Strunk, Michael J. Erickson, Daniel V. Zilavy