Patents by Inventor Daniel W. E. Verbugt

Daniel W. E. Verbugt has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6448592
    Abstract: It is known in charge coupled devices to use a dual layer of silicon oxide and silicon nitride as the gate dielectric. Since silicon nitride is practically impermeable to hydrogen, the nitride layer is usually provided with openings through which hydrogen can penetrate up to the surface of the silicon body during the annealing step carried out for passivating the surface. The openings in the nitride layer are provided by a known method, with gates in a first poly layer serving as a mask, in that the nitride is removed from between these gates and an oxidation step is subsequently carried out. According to the invention, the openings in the nitride layer are formed by means of a separate mask (20), such that the edges of the openings (9) in the nitride layer (8) lie at some distance from the edges of the gates.
    Type: Grant
    Filed: September 5, 1997
    Date of Patent: September 10, 2002
    Assignee: Koninklijke Philips Electronics N.V.
    Inventors: Hermanus L. Peek, Daniel W. E. Verbugt
  • Patent number: 6054336
    Abstract: It may be necessary to provide conductors at very small distances from one another when electronic circuits, for example integrated circuits, are manufactured on an insulating substrate. A multilayer wiring system is often used in that case. The invention renders it possible to make very small inter-electrode gaps in a single conductor layer. To achieve this, the conductor layer is covered with a comparatively thick dielectric layer 4, 5 in which windows 8 are formed which extend over only part of the dielectric layer. Then an auxiliary layer 9 is provided which has depressions at the areas of the windows 8. Windows 11 are formed in the dielectric layer by anisotropic etching-back with dimensions which are substantially smaller than the dimensions of the original windows 8. The windows 11 may be used as etching windows or oxidation windows for the subsequent formation of the definitive conductor pattern.
    Type: Grant
    Filed: May 26, 1998
    Date of Patent: April 25, 2000
    Assignee: U.S. Philips Corporation
    Inventors: Hermanus L. Peek, Daniel W. E. Verbugt