Abstract: An initializing circuit for automatically providing a pulse of a duration sufficient to initialize all the relevant storage elements in an electronic calculator computing system having one or two power supplies. It comprises a power-on pulse generator controlled by two phase clock buffers utilizing a feed-back loop including a bit of delay to guarantee a minimum of one bit time duration for the power-on level. The two phase clock buffers are activated at turn-on to remain in a steady state by a power-on level detecting sub-circuit to control the pulse generator. When a one bit pulse is insufficient to initialize the system, a flip-flop and a counter may be used to generate a longer pulse.