Abstract: Aspects of the present disclosure relate to a photon counting detector and to a read-out integrated circuit to be used in such detector. Aspects of the present disclosure particularly relate to X-ray applications. According to an aspect of the present disclosure, the detector comprises an electrical ground plane arranged at or near an interface between the carrier and at least one ROIC die. Each ROIC die comprises an extension region that laterally extends beyond the photon conversion assembly, wherein peripheral circuitry for a given ROIC die is arranged in the extension region of that ROIC die. The detector comprises at least one electrical connection that connects the power supply line that is arranged on the carrier to the peripheral circuitry of the at least one ROIC die.

Abstract: Aspects of the present disclosure relate to a photon counting detector and to a read-out integrated circuit to be used in such detector. Aspects of the present disclosure particularly relate to X-ray applications. According to an aspect of the present disclosure, the detector comprises an electrical ground plane arranged at or near an interface between the carrier and at least one ROIC die. Each ROIC die comprises an extension region that laterally extends beyond the photon conversion assembly, wherein peripheral circuitry for a given ROIC die is arranged in the extension region of that ROIC die. The detector comprises at least one electrical connection that connects the power supply line that is arranged on the carrier to the peripheral circuitry of the at least one ROIC die.

Abstract: The present invention relates to an image sensor and to an X-ray system comprising such image sensor. More in particular, the invention relates to an image sensor wherein dose sensing pixels are used in conjunction with artificial pixels to sense a dose of incoming light or radiation. According to the invention, the image sensor comprises one or more shielded photo-sensitive pixels that are shielded for incoming photons and which are each configured for outputting a further reference voltage, wherein the input voltage of the artificial pixels is set in dependence on the outputted further reference voltage(s).

Abstract: The present invention relates to an image sensor and to an imaging system comprising such a sensor. According to the invention, the overall conversion curve describing the conversion between photon flux and digital number comprises a first region in which the conversion is essentially linear and a second region in which the conversion is essentially non-linear. According to the invention, the non-linearity of the second region is obtained by operating the photodiode of the image sensor in its non-linear range and by changing the gain associated with the conversion between pixel voltage and digital number.

Abstract: The present invention relates to an image sensor and to an imaging system comprising such a sensor. According to the invention, the overall conversion curve describing the conversion between photon flux and digital number comprises a first region in which the conversion is essentially linear and a second region in which the conversion is essentially non-linear. According to the invention, the non-linearity of the second region is obtained by operating the photodiode of the image sensor in its non-linear range and by changing the gain associated with the conversion between pixel voltage and digital number.

Abstract: Disclosed are embodiments of a semiconductor device comprising a semiconductor body with a semiconductor image sensor comprising a two-dimensional matrix of picture elements, each picture element comprising a radiation-sensitive element coupled to MOS field effect transistors for reading the radiation-sensitive elements, wherein a semiconductor region is sunken in the surface of the body having the same conductivity type as the body and having an increased doping concentration, the semiconductor region being disposed between the radiation-sensitive elements of neighboring picture elements.

Abstract: A method of scanning pixels, each pixel including a photodiode and a sense node formed in the substrate, including a transfer gate coupled between the photodiode and the sense node, and including a memory gate coupled between the photodiode and the transfer gate. The method switches a control signal, connected to a memory gate electrode of all pixels, alternately between a first voltage and a second voltage that is intermediate between the first voltage and a substrate voltage. The first voltage transfers all photo charge in each photodiode into the respective memory gate. The second voltage both (1) holds all photo charge already transferred into the memory gate and (2) blocks further transfer of photo charges into each memory gate. The method further includes reading out photo charge from the memory gate on a row-by-row basis while the control signal is at the second voltage.

Abstract: A method of scanning pixels, each pixel including a photodiode and a sense node formed in the substrate, including a transfer gate coupled between the photodiode and the sense node, and including a memory gate coupled between the photodiode and the transfer gate. The method switches a control signal, connected to a memory gate electrode of all pixels, alternately between a first voltage and a second voltage that is intermediate between the first voltage and a substrate voltage. The first voltage transfers all photo charge in each photodiode into the respective memory gate. The second voltage both (1) holds all photo charge already transferred into the memory gate and (2) blocks further transfer of photo charges into each memory gate. The method further includes reading out photo charge from the memory gate on a row-by-row basis while the control signal is at the second voltage.

Abstract: A method for joining a plurality of reticles is used for producing a semiconductor layout pattern, so that the reticles will collectively map a circuit arrangement on a semiconductor substrate. A plurality of matching patterns is provided that are each geometrically linked to a respective particular reticle and through detecting pairwise correspondence among the matching patterns likewise correspondence among the associated reticles is ascertained. In particular, the method has bulk sub-reticles and peripheral sub-reticles, and a first matching pattern associates to a peripheral sub-reticle that abuts a bulk sub-reticle and a second matching pattern to the bulk sub-reticle at such distance therefrom that fitting of the peripheral sub-reticle between the second matching pattern and the bulk sub-reticle allows matching of the first and second matching patterns. The bulk sub-reticles are used to constitute an array of sub-reticles.

Abstract: The invention relates to a semiconductor device with a semiconductor body comprising a CMOS image sensor with an active region having viewed in projection first sides and second sides perpendicular to the first sides said active region comprising a matrix of active pixels arranged in rows and columns, each pixel having a photosensitive region, the device further comprising a plurality of circuit elements for operating the pixel in the image forming process, the plurality of circuit elements comprising a first set of circuit elements for read-out of the columns and a second set of circuit elements for controlling the rows. According to the invention a first part of the plurality of circuit elements is positioned outside the matrix along one of the first sides and a second part of the plurality of circuit elements is positioned within the matrix of active pixels remote from the second sides.

Abstract: The invention relates to a semiconductor device with a semiconductor body comprising a CMOS image sensor with an active region having viewed in projection first sides and second sides perpendicular to the first sides said active region comprising a matrix of active pixels arranged in rows and columns, each pixel having a photosensitive region, the device further comprising a plurality of circuit elements for operating the pixel in the image forming process, the plurality of circuit elements comprising a first set of circuit elements for read-out of the columns and a second set of circuit elements for controlling the rows. According to the invention a first part of the plurality of circuit elements is positioned outside the matrix along one of the first sides and a second part of the plurality of circuit elements is positioned within the matrix of active pixels remote from the second sides.

Abstract: A CMOS-based sensor apparatus comprises an array of sensor cells that are interconnected by a first set of vertical driver lines to a selective driver facility and by a second set of horizontal sensing lines to a sensing facility for sensing respectively sensed amounts of radiation. In particular, the sensor cells through being appropriately spaced in at least either row or column direction, comprise a redundancy facility that is selectively activatable for isolating an interconnect short on the basis of externally applied control actuation.

Abstract: A method of manufacturing a back-side (14) illuminated image sensor (1) is disclosed, comprising the steps of: starting with a wafer (2) having a first (3) and a second surface (4), providing light sensitive pixel regions (5) extending into the wafer (2) from the first surface (3), securing the wafer (2) onto a protective substrate (7) such that the first surface (3) faces the protective substrate, the wafer comprising a substrate of a first material (8) with an optical transparent layer (9) and a layer of semiconductor material (10), wherein the substrate (8) is selectively removed from the layer of semiconductor material by using the optical transparent layer (9) as stopping layer. For back-side illuminated image sensors, light has to transmit through the semiconductor layer and enter into the light sensitive pixel regions (5). In order to reduce absorption losses, it is very advantageous that the semiconductor layer (10) can be made relatively thin with a good uniformity.

Abstract: The invention relates to a semiconductor device with a semiconductor body (12) with an image sensor comprising a two-dimensional matrix of pixels (1) each comprising a radiation-sensitive element (2) with a charge accumulating semiconductor region (2A) and coupled to a number of MOS field effect transistors (3), in which in the semiconductor body (12) an isolation region (4) is sunken for the separation of neighboring pixels (1) underneath which a further semiconductor region (5) with an enlarged doping concentration is formed. According to the invention the further semiconductor region (5) is sunken in the surface of the semiconductor body (12) and wider than the isolation region (4).

Abstract: A method for joining a plurality of reticles is used for producing a semiconductor layout pattern, so that the reticles will collectively map a circuit arrangement on a semiconductor substrate. A plurality of matching patterns is provided that are each geometrically linked to a respective particular reticle and through detecting pairwise correspondence among the matching patterns likewise correspondence among the associated reticles is ascertained. In particular, the method has bulk sub-reticles and peripheral sub-reticles, and a first matching pattern associates to a peripheral sub-reticle that abuts a bulk sub-reticle and a second matching pattern to the bulk sub-reticle at such distance therefrom that fitting of the peripheral sub-reticle between the second matching pattern and the bulk sub-reticle allows matching of the first and second matching patterns. The bulk sub-reticles are used to constitute an array of sub-reticles.

Abstract: A detector and a camera system for electromagnetic radiation being integrated in a solid state substrate are disclosed. Said substrate comprises a first region of a first conductivity and a second region of a second conductivity, said first region being adjacent to said second region, and said first and second region forming a detection junction, at least part of said junction being substantially orthogonal with respect to the plane of the surface of the substrate above said detection junction. The camera system comprises a configuration of pixels in an imaging sensor being integrated in a solid state substrate, essentially each of the pixels comprising a region of a first conductivity type being at least partly surrounded by a region of a second conductivity type, thereby forming a junction region, and wherein the region of the first conductivity type includes at least one contact area.

Abstract: A charge-coupled image sensor comprising a silicon body (1) wherein parallel channel regions (12), mutually separated by channel stop regions (16), are formed so as to be adjacent to a surface (2) of the body. The surface is provided with a gate dielectric (3, 4) composed of a silicon oxide layer (3) covered with a silicon nitride layer (4). Gate electrodes (18, 21, 33) of polycrystalline silicon are formed on the gate dielectric, which gate electrodes cross the channel regions and the channel stop regions. At least a number of the gate electrodes extend into diffusion holes (17), at the location where the gate electrodes and the channel stop regions intersect, which diffusion holes are formed in the silicon nitride layer of the gate dielectric. An insulating layer (24) of silicon oxide is formed on all gate electrodes, said insulating layer being provided with shunt electrodes (27) situated above the channel stop regions.

Abstract: A method of manufacturing a charge-coupled image sensor, wherein a silicon slice (1) is provided at its surface with semiconductor zones (8, 12, 16) formed by implantation of ions of dopants and subsequent heat treatments. The surface (2) is provided with a gate dielectric (3, 4) comprising a layer of silicon oxide (3) and a layer of silicon nitride (4) deposited on said layer of silicon oxide (3). A system of electrodes (17, 20) is formed on the gate dielectric layer (3, 4). In this method, the semiconductor zones (8, 12, 16) are not formed in the silicon slice (1) until after the gate dielectric layer (3, 4) has been formed, the ions being implanted through the gate dielectric layer (3, 4). An image sensor thus formed has a very small dark current, a very low fixed pattern noise, and images formed by means of the sensor are practically free of white spots.

Abstract: A detector and a camera system for electromagnetic radiation being integrated in a solid state substrate are disclosed. Said substrate comprises a first region of a first conductivity and a second region of a second conductivity, said first region being adjacent to said second region, and said first and second region forming a detection junction, at least part of said junction being substantially orthogonal with respect to the plane of the surface of the substrate above said detection junction. The camera system comprises a configuration of pixels in an imaging sensor being integrated in a solid state substrate, essentially each of the pixels comprising a region of a first conductivity type being at least partly surrounded by a region of a second conductivity type, thereby forming a junction region, and wherein the region of the first conductivity type includes at least one contact area.