Patents by Inventor Daniel Wilkinson

Daniel Wilkinson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240293546
    Abstract: The present disclosure provides, in part, a novel chimeric antigen receptor (CAR) T cell that will simultaneously target wildtype EGFR (EGFRwt) and the vIII variant (EGFRvIII) and methods of making and using same.
    Type: Application
    Filed: July 1, 2022
    Publication date: September 5, 2024
    Inventors: Peter FECCI, Darell BIGNER, Daniel LANDI, Daniel WILKINSON, Katherine RYAN
  • Publication number: 20240182540
    Abstract: The present invention provides recombinant TIM-4 fusion proteins comprising an extracellular domain of TIM-4 and at least one co-stimulatory domain. Also provided are cells comprising the fusion protein and methods of making and using the same.
    Type: Application
    Filed: November 16, 2023
    Publication date: June 6, 2024
    Inventors: Peter Fecci, Daniel Wilkinson, Ethan Srinivasan
  • Publication number: 20240156868
    Abstract: The present invention provides recombinant TIM-4 fusion proteins comprising a domain of TIM-4 and a scFv specific for CD3 and methods of making and using the same. The fusion proteins provided herein may be administered in combination with CAR T cells. In addition CAR T cells engineered to express the TIM-4 fusion proteins described herein are also provided and may be used in the methods described herein.
    Type: Application
    Filed: November 16, 2023
    Publication date: May 16, 2024
    Inventors: Peter Fecci, Daniel Wilkinson
  • Patent number: 11940940
    Abstract: A processing device has a plurality of interfaces and a plurality of processors. During different phases of execution of a computer program, different processors are associated with different interfaces, such that the connectivity between processors and interfaces for the sending of egress data and the receiving of ingress data may change during execution of that computer program. The change in this connectivity is directed by the compiled code running on the processors. The compiled code selects which buses associated with which interfaces, given processors are to connect to for receipt of ingress data. Furthermore, the compiled code causes control messages to be sent to circuitry associated with the interfaces, so as to control which buses associated with which processors, given interfaces are to connect to.
    Type: Grant
    Filed: April 12, 2022
    Date of Patent: March 26, 2024
    Assignee: GRAPHCORE LIMITED
    Inventors: Daniel Wilkinson, Stephen Felix, Simon Knowles, Graham Cunningham, David Lacey
  • Patent number: 11939550
    Abstract: Disclosed herein is an overbased alkaline earth metal hydrocarbyl-substituted salicylate detergent comprising both carbonate and borate moieties and exhibiting the following characteristics: a basicity index of at least 3.8; a ratio of soap content to mass % boron is greater than 55 mmol/kg; a soap content of at least 330 mmol/kg; a TBN, measured according to ASTM D2896, of at least 220 mg KOH/g; and a mass ratio of borate to carbonate from 0.75 to 6.0, wherein the alkaline earth metal comprises calcium and/or magnesium, and the hydrocarbyl substitution comprises 9 to 30 carbon atoms. Methods of making the boron-containing salicylate detergent, specifically to be package-stable, are also disclosed, as well as package-stable lubricant additive package concentrates and lubricating oil compositions containing same.
    Type: Grant
    Filed: December 2, 2022
    Date of Patent: March 26, 2024
    Assignee: Infineum International Limited
    Inventors: Thomas Daniel Wilkinson, Oliver Delamore, Alexander Coxon, Marcus Popowicz, Ara Samonte, Mallika Rana
  • Patent number: 11907408
    Abstract: A device comprising a processing unit having a plurality of processors is provided. At least one encryption unit is provided as part of the device for encrypting data written by the processors to external storage and decrypting data read from that storage. The processors are divided into different sets, with state information held in the encryption unit for performing encryption/decryption operations for requests for different sets of processors. This enables interleaved read completions or write requests from different sets of processors to be handled by the encryption unit, since associated state information for each set of processors is independently maintained.
    Type: Grant
    Filed: March 29, 2021
    Date of Patent: February 20, 2024
    Assignee: GRAPHCORE LIMITED
    Inventors: Graham Cunningham, Daniel Wilkinson
  • Patent number: 11822427
    Abstract: Signature generation circuitry is configured to update a signature in response to each of a plurality of writes to memory. The signature is updated by performing bitwise operations between current bit values of the signature and at least some of the bits written to memory in response a write. The bitwise operation are order-independent such that the resulting signature is the same irrespective of the order in which the writes are used to update the signature. The signatures are formed in an order-independent manner such that, if no errors have occurred in generating the data to be written to be memory, the signatures will match. In this way, a compact signature is developed that is suitable export from the data processing device for checking against a corresponding data processing device of a machine running a duplicate application.
    Type: Grant
    Filed: August 30, 2022
    Date of Patent: November 21, 2023
    Assignee: GRAPHCORE LIMITED
    Inventors: Stephen Felix, Daniel Wilkinson, Graham Bernard Cunningham
  • Publication number: 20230281144
    Abstract: A processing device has a plurality of interfaces and a plurality of processors. During different phases of execution of a computer program, different processors are associated with different interfaces, such that the connectivity between processors and interfaces for the sending of egress data and the receiving of ingress data may change during execution of that computer program. The change in this connectivity is directed by the compiled code running on the processors. The compiled code selects which buses associated with which interfaces, given processors are to connect to for receipt of ingress data. Furthermore, the compiled code causes control messages to be sent to circuitry associated with the interfaces, so as to control which buses associated with which processors, given interfaces are to connect to.
    Type: Application
    Filed: April 12, 2022
    Publication date: September 7, 2023
    Inventors: Daniel WILKINSON, Stephen FELIX, Simon KNOWLES, Graham CUNNINGHAM, David LACEY
  • Patent number: 11695709
    Abstract: A hardware module comprises at least a first ingress buffer and a second ingress buffer, where the second ingress buffer holds data packets from a plurality of source components. To ensure fairness between one or more sources providing data to the first ingress buffer and the plurality of sources providing data to the second ingress buffer, processing circuitry examines source identifiers in packets held in the second ingress buffer and selects between the buffers so as to arbitrate between the sources. In some embodiments, the examination of the source identifiers provides statistics for a weighted round robin between the ingress buffers. In other embodiments, the source identifier of whichever packet is currently at the head of the second ingress buffer is used to perform a simple round robin between the sources.
    Type: Grant
    Filed: April 12, 2022
    Date of Patent: July 4, 2023
    Assignee: GRAPHCORE LIMITED
    Inventors: Daniel Wilkinson, Graham Cunningham, Hachem Yassine
  • Publication number: 20230183593
    Abstract: Disclosed herein is an overbased alkaline earth metal hydrocarbyl-substituted salicylate detergent comprising both carbonate and borate moieties and exhibiting the following characteristics: a basicity index of at least 3.8; a ratio of soap content to mass % boron is greater than 55 mmol/kg; a soap content of at least 330 mmol/kg; a TBN, measured according to ASTM D2896, of at least 220 mg KOH/g; and a mass ratio of borate to carbonate from 0.75 to 6.0, wherein the alkaline earth metal comprises calcium and/or magnesium, and the hydrocarbyl substitution comprises 9 to 30 carbon atoms. Methods of making the boron-containing salicylate detergent, specifically to be package-stable, are also disclosed, as well as package-stable lubricant additive package concentrates and lubricating oil compositions containing same.
    Type: Application
    Filed: December 2, 2022
    Publication date: June 15, 2023
    Applicant: Infineum International Limited
    Inventors: Thomas Daniel Wilkinson, Oliver Delamore, Alexander Coxon, Marcus Popwicz, Ara Samonte, Mallika Rana
  • Publication number: 20230144797
    Abstract: A hardware module comprises at least a first ingress buffer and a second ingress buffer, where the second ingress buffer holds data packets from a plurality of source components. To ensure fairness between one or more sources providing data to the first ingress buffer and the plurality of sources providing data to the second ingress buffer, processing circuitry examines source identifiers in packets held in the second ingress buffer and selects between the buffers so as to arbitrate between the sources. In some embodiments, the examination of the source identifiers provides statistics for a weighted round robin between the ingress buffers. In other embodiments, the source identifier of whichever packet is currently at the head of the second ingress buffer is used to perform a simple round robin between the sources.
    Type: Application
    Filed: April 12, 2022
    Publication date: May 11, 2023
    Inventors: Daniel WILKINSON, Graham CUNNINGHAM, Hachem YASSINE
  • Publication number: 20220413961
    Abstract: Signature generation circuitry is configured to update a signature in response to each of a plurality of writes to memory. The signature is updated by performing bitwise operations between current bit values of the signature and at least some of the bits written to memory in response a write. The bitwise operation are order-independent such that the resulting signature is the same irrespective of the order in which the writes are used to update the signature. The signatures are formed in an order-independent manner such that, if no errors have occurred in generating the data to be written to be memory, the signatures will match. In this way, a compact signature is developed that is suitable export from the data processing device for checking against a corresponding data processing device of a machine running a duplicate application.
    Type: Application
    Filed: August 30, 2022
    Publication date: December 29, 2022
    Inventors: Stephen FELIX, Daniel WILKINSON, Graham Bernard CUNNINGHAM
  • Patent number: 11461175
    Abstract: Signature generation circuitry is configured to update a signature in response to each of a plurality of writes to memory. The signature is updated by performing bitwise operations between current bit values of the signature and at least some of the bits written to memory in response a write. The bitwise operation are order-independent such that the resulting signature is the same irrespective of the order in which the writes are used to update the signature. The signatures are formed in an order-independent manner such that, if no errors have occurred in generating the data to be written to be memory, the signatures will match. In this way, a compact signature is developed that is suitable export from the data processing device for checking against a corresponding data processing device of a machine running a duplicate application.
    Type: Grant
    Filed: September 17, 2021
    Date of Patent: October 4, 2022
    Assignee: GRAPHCORE LIMITED
    Inventors: Stephen Felix, Daniel Wilkinson, Graham Bernard Cunningham
  • Patent number: 11449117
    Abstract: During normal operation of a processor, voltage droop is likely to occur and there is, therefore, a need for techniques for rapidly addressing this droop so as to reduce the probability of circuit timing failures. This problem is addressed by provided an apparatus that is configured to detect the droop and react to mitigate the droop. The apparatus includes a frequency divider that is configured to receive an output of a clock signal generator (e.g. a phase locked loop) and produce an output signal in which a predefined fraction of the clock pulses in the output of the clock signal generator are removed from the output signal. By reducing the frequency of the clock signal in this way (as may be understood by examining equation 3) VDD is increased, hence mitigating the voltage droop. This technique provides a fast throttling mechanism that prevents excessive VDD droop across the processor.
    Type: Grant
    Filed: April 8, 2020
    Date of Patent: September 20, 2022
    Assignee: GRAPHCORE LIMITED
    Inventors: Stephen Felix, Daniel Wilkinson
  • Publication number: 20220083695
    Abstract: A device comprising a processing unit having a plurality of processors is provided. At least one encryption unit is provided as part of the device for encrypting data written by the processors to external storage and decrypting data read from that storage. The processors are divided into different sets, with state information held in the encryption unit for performing encryption/decryption operations for requests for different sets of processors. This enables interleaved read completions or write requests from different sets of processors to he handled by the encryption unit, since associated state information for each set of processors is independently maintained.
    Type: Application
    Filed: March 29, 2021
    Publication date: March 17, 2022
    Inventors: Graham Cunningham, Daniel Wilkinson
  • Publication number: 20210191488
    Abstract: During normal operation of a processor, voltage droop is likely to occur and there is, therefore, a need for techniques for rapidly addressing this droop so as to reduce the probability of circuit timing failures. This problem is addressed by provided an apparatus that is configured to detect the droop and react to mitigate the droop. The apparatus includes a frequency divider that is configured to receive an output of a clock signal generator (e.g. a phase locked loop) and produce an output signal in which a predefined fraction of the clock pulses in the output of the clock signal generator are removed from the output signal. By reducing the frequency of the clock signal in this way (as may be understood by examining equation 3) VDD is increased, hence mitigating the voltage droop. This technique provides a fast throttling mechanism that prevents excessive VDD droop across the processor.
    Type: Application
    Filed: April 8, 2020
    Publication date: June 24, 2021
    Inventors: Stephen FELIX, Daniel WILKINSON
  • Patent number: 9819902
    Abstract: A telecommunications device sends and receives messages comprising data about telecommunications resources and resource state of proximate devices. The telecommunications device has a processor configured to determine a proximate resource pool using at least the telecommunication resources of the other devices, and the state of the telecommunications resources of the other devices, the proximate resource pool comprising a list of content streams being generated by, or potentially being generated by, specified ones of the other devices. The processor is configured to receive instructions from one of the other devices, the instructions being to add, divert or stop a specified content stream of the proximate resource pool within a telecommunications activity ongoing at the device. In various examples, the processor is configured to execute the instructions responsive to the instructions being from a trusted device, or responsive to user authorization.
    Type: Grant
    Filed: March 19, 2015
    Date of Patent: November 14, 2017
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Edward Sean Lloyd Rintel, Richard Harry Robert Harper, Kenton Paul Anthony O'Hara, Philip Charles Gosset, Daniel Wilkinson Gratiot, Ian James Ray
  • Patent number: 9808066
    Abstract: A hair care appliance including, a body, a heater, a PCB and a primary fluid flow path extending from a primary fluid inlet into the appliance to a primary fluid outlet out of the body wherein the PCB and heater are in fluid communication with the primary fluid flow path and the PCB is upstream of the heater. A fan unit may be provided and the fan unit is upstream of the heater and may be upstream or downstream of the PCB. A thermal barrier may be provided between the PCB and the heater. The thermal barrier may be in thermal communication with the PCB and functions as a heat sink for the PCB.
    Type: Grant
    Filed: June 13, 2014
    Date of Patent: November 7, 2017
    Assignee: Dyson Technology Limited
    Inventors: Patrick Joseph William Moloney, Anthony Thomas Gosnay, Nicholas Stuart Harrod, Robert Lawrence Tweedie, Christopher Daniel Wilkinson, Stephen Benjamin Courtney
  • Publication number: 20160277708
    Abstract: A telecommunications device sends and receives messages comprising data about telecommunications resources and resource state of proximate devices. The telecommunications device has a processor configured to determine a proximate resource pool using at least the telecommunication resources of the other devices, and the state of the telecommunications resources of the other devices, the proximate resource pool comprising a list of content streams being generated by, or potentially being generated by, specified ones of the other devices. The processor is configured to receive instructions from one of the other devices, the instructions being to add, divert or stop a specified content stream of the proximate resource pool within a telecommunications activity ongoing at the device. In various examples, the processor is configured to execute the instructions responsive to the instructions being from a trusted device, or responsive to user authorization.
    Type: Application
    Filed: March 19, 2015
    Publication date: September 22, 2016
    Inventors: Edward Sean Lloyd Rintel, Richard Harry Robert Harper, Kenton Paul Anthony O'Hara, Philip Charles Gosset, Daniel Wilkinson Gratiot, Ian James Ray
  • Publication number: 20160220004
    Abstract: A hair care appliance including, a body, a heater, a PCB and a primary fluid flow path extending from a primary fluid inlet into the appliance to a primary fluid outlet out of the body wherein the PCB and heater are in fluid communication with the primary fluid flow path and the PCB is upstream of the heater. A fan unit may be provided and the fan unit is upstream of the heater and may be upstream or downstream of the PCB. A thermal barrier may be provided between the PCB and the heater. The thermal barrier may be in thermal communication with the PCB and functions as a heat sink for the PCB.
    Type: Application
    Filed: June 13, 2014
    Publication date: August 4, 2016
    Applicant: Dyson Technology Limited
    Inventors: Patrick Joseph William MOLONEY, Anthony Thomas GOSNAY, Nicholas Stuart HARROD, Robert Lawrence TWEEDIE, Christopher Daniel WILKINSON, Stephen Benjamin COURTNEY