Abstract: Techniques for designing and fabricating quantum circuitry, including a coplanar waveguide (CPW), for quantum applications are presented. With regard to a CPW, a central conductor and two return conductor lines can be formed on a dielectric substrate, with one return conductor line on each side of the central conductor and separated from it by a space. The central conductor can have bridge portions that can be raised a desired distance above the substrate and base conductor portions situated between the bridge portions and in contact with the surface of the substrate; and/or portions of the substrate underneath the bridge portions of the central conductor can be removed such that the bridge portions, whether raised or unraised, can be the desired distance above the surface of the remaining substrate, and the base conductor portions can be in contact with other portions of the surface of the substrate that were not removed.

Abstract: Techniques regarding determining the temperature of one or more quantum computing devices are provided. For example, one or more embodiments described herein can comprise a system, which can comprise a temperature component that can determine a temperature of a superconducting resonator based on a frequency shift exhibited by the superconducting resonator due to a change in kinetic inductance with a change in temperature.

Abstract: A system for transmission of quantum information for quantum error correction includes an ancilla qubit chip including a plurality of ancilla qubits, and a data qubit chip spaced apart from the ancilla qubit chip, the data qubit chip including a plurality of data qubits. The system includes an interposer coupled to the ancilla qubit chip and the data qubit chip, the interposer including a dielectric material and a plurality of superconducting structures formed in the dielectric material. The superconducting structures enable transmission of quantum information between the plurality of data qubits on the data qubit chip and the plurality of ancilla qubits on the ancilla qubit chip via virtual photons for quantum error correction.

Abstract: Techniques regarding determining and/or analyzing temperature distributions experienced by quantum computer devices during operation are provided. For example, one or more embodiments described herein can comprise a system, which can comprise a memory that can store computer executable components. The system can also comprise a processor, operably coupled to the memory, and that can execute the computer executable components stored in the memory. The computer executable components can comprise a region component that can define a plurality of temperature regions from a quantum computing device layout. The computer executable component can also comprise a map component that can generate a map that characterizes a temperature distribution by determining at least one temperature achieved within the plurality of temperature regions during an operation of the quantum computing device layout.

Abstract: A system for transmission of quantum information for quantum error correction includes an ancilla qubit chip including a plurality of ancilla qubits, and a data qubit chip spaced apart from the ancilla qubit chip, the data qubit chip including a plurality of data qubits. The system includes an interposer coupled to the ancilla qubit chip and the data qubit chip, the interposer including a dielectric material and a plurality of superconducting structures formed in the dielectric material. The superconducting structures enable transmission of quantum information between the plurality of data qubits on the data qubit chip and the plurality of ancilla qubits on the ancilla qubit chip via virtual photons for quantum error correction.

Abstract: Systems, computer-implemented methods, and computer program products that can facilitate determining a state of a qubit are described. According to an embodiment, a system can comprise a memory that stores computer executable components and a processor that executes the computer executable components stored in the memory. The computer executable components can comprise a relation determining component that can determine relation of a status signal of a quantum computing device to a noise value of the quantum computing device. The system can further include an operation time estimator that can estimate an operation time for the quantum computing device based on the relation of the status signal to the noise value.

Abstract: Devices, systems, methods, and computer-implemented methods to facilitate employing thermalizing materials in an enclosure for quantum computing devices are provided. According to an embodiment, a system can comprise a quantum computing device and an enclosure having the quantum computing device disposed within the enclosure. The system can further comprise a thermalizing material disposed within the enclosure, with the thermalizing material being adapted to thermally link a cryogenic device to the quantum computing device.

Abstract: A system includes a quantum processor includes a plurality of qubits. For each qubit, there is a circulator operative to receive a control signal and an output signal from the qubit. An isolator is coupled to an output of the circulator. A quantum-limited amplifier is coupled to an output of the isolator and configured to provide an output of the qubit. A multiplexor (MUX) is configured to frequency multiplex the outputs of at least two of the plurality of qubits as a single output of the quantum processor.

Abstract: A system includes a quantum processor includes a plurality of qubits. For each qubit, there is a circulator operative to receive a control signal and an output signal from the qubit. An isolator is coupled to an output of the circulator. A quantum-limited amplifier is coupled to an output of the isolator and configured to provide an output of the qubit. A multiplexor (MUX) is configured to frequency multiplex the outputs of at least two of the plurality of qubits as a single output of the quantum processor.

Abstract: A quantum computing system includes a dilution refrigerator having a plurality of chambers. A trapped ion computing device includes a first set of qubits in a given chamber of the plurality of chambers of the dilution refrigerator. A superconducting computing device having a second set of superconducting qubits is inside the given chamber of the plurality of chambers of the dilution refrigerator.

Abstract: Techniques for designing and fabricating quantum circuitry, including a coplanar waveguide (CPW), for quantum applications are presented. With regard to a CPW, a central conductor and two return conductor lines can be formed on a dielectric substrate, with one return conductor line on each side of the central conductor and separated from it by a space. The central conductor can have bridge portions that can be raised a desired distance above the substrate and base conductor portions situated between the bridge portions and in contact with the surface of the substrate; and/or portions of the substrate underneath the bridge portions of the central conductor can be removed such that the bridge portions, whether raised or unraised, can be the desired distance above the surface of the remaining substrate, and the base conductor portions can be in contact with other portions of the surface of the substrate that were not removed.

Abstract: Systems, computer-implemented methods, and computer program products that can facilitate determining a state of a qubit are described. According to an embodiment, a system can comprise a memory that stores computer executable components and a processor that executes the computer executable components stored in the memory. The computer executable components can comprise a relation determining component that can determine relation of a status signal of a quantum computing device to a noise value of the quantum computing device. The system can further include an operation time estimator that can estimate an operation time for the quantum computing device based on the relation of the status signal to the noise value.

Abstract: Devices, systems, methods, and computer-implemented methods to facilitate employing thermalizing materials in an enclosure for quantum computing devices are provided. According to an embodiment, a system can comprise a quantum computing device and an enclosure having the quantum computing device disposed within the enclosure. The system can further comprise a thermalizing material disposed within the enclosure, with the thermalizing material being adapted to thermally link a cryogenic device to the quantum computing device.

Abstract: Techniques regarding shielding one or more superconducting devices are provided. For example, one or more embodiments described herein can comprise an apparatus, which can comprise a multi-layer enclosure that shields a superconducting device from a magnetic field and radiation. Further, the multi-layer enclosure can comprise a superconducting material layer that can have a thickness that inhibits a penetration of the multi-layer enclosure by the magnetic field. The multi-layer enclosure can also comprise a metal layer adjacent to the superconducting material layer. The metal layer can have a high thermal conductivity that achieves thermalization with the superconducting material layer. Moreover, the multi-layer enclosure can comprise a radiation shield layer adjacent to the superconducting material layer.

Abstract: Techniques regarding determining the temperature of one or more quantum computing devices are provided. For example, one or more embodiments described herein can comprise a system, which can comprise a temperature component that can determine a temperature of a superconducting resonator based on a frequency shift exhibited by the superconducting resonator due to a change in kinetic inductance with a change in temperature.

Abstract: Techniques regarding determining and/or analyzing temperature distributions experienced by quantum computer devices during operation are provided. For example, one or more embodiments described herein can comprise a system, which can comprise a memory that can store computer executable components. The system can also comprise a processor, operably coupled to the memory, and that can execute the computer executable components stored in the memory. The computer executable components can comprise a region component that can define a plurality of temperature regions from a quantum computing device layout. The computer executable component can also comprise a map component that can generate a map that characterizes a temperature distribution by determining at least one temperature achieved within the plurality of temperature regions during an operation of the quantum computing device layout.

Abstract: A thermalization structure is formed using a cover configured with a set of pillars, the cover being a part of a cryogenic enclosure of a low temperature device (LTD). A chip including the LTD is configured with a set of cavities, a cavity in the set of cavities having a cavity profile. A pillar from the set of pillars and corresponding to the cavity has a pillar profile such that the pillar profile causes the pillar to couple with the cavity of the cavity profile within a gap tolerance to thermally couple the chip to the cover for heat dissipation in a cryogenic operation of the chip.

Abstract: This disclosure relates to methods that include depositing a first component and a second component to form a film including a plurality of nanostructures, and coating the nanostructures with a hydrophobic layer to render the film superhydrophobic. The first component and the second component can be immiscible and phase-separated during the depositing step. The first component and the second component can be independently selected from the group consisting of a metal oxide, a metal nitride, a metal oxynitride, a metal, and combinations thereof. The films can have a thickness greater than or equal to 5 nm; an average surface roughness (Ra) of from 90 to 120 nm, as measured on a 5 ?m×5 ?m area; a surface area of at least 20 m2/g; a contact angle with a drop of water of at least 120 degrees; and can maintain the contact angle when exposed to harsh conditions.

Abstract: This disclosure relates to methods that include depositing a first component and a second component to form a film including a plurality of nanostructures, and coating the nanostructures with a hydrophobic layer to render the film superhydrophobic. The first component and the second component can be immiscible and phase-separated during the depositing step. The first component and the second component can be independently selected from the group consisting of a metal oxide, a metal nitride, a metal oxynitride, a metal, and combinations thereof. The films can have a thickness greater than or equal to 5 nm; an average surface roughness (Ra) of from 90 to 120 nm, as measured on a 5 ?m×5 ?m area; a surface area of at least 20 m2/g; a contact angle with a drop of water of at least 120 degrees; and can maintain the contact angle when exposed to harsh conditions.