Patents by Inventor Daniele Alfredo Brambilla
Daniele Alfredo Brambilla has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9177878Abstract: Indexing a plurality of die obtainable from a material wafer comprising a plurality of stacked material layers. Each die is obtained in a respective position of the wafer. A manufacturing stage comprises at least two steps for treating a respective superficial portion of the material wafer that corresponds to a subset of said plurality of dies using the at least one lithographic mask through the exposition to the proper radiation in temporal succession. The method may include providing a die index on each die which is indicative of the position of the respective die by forming an external index indicative of the position of the superficial portion of the material wafer corresponding to the subset of the plurality of dies including said die and may comprise a plurality of electronic components electrically coupled to each other by means of a respective common control line.Type: GrantFiled: July 2, 2014Date of Patent: November 3, 2015Assignee: STMicroelectronics S.r.l.Inventors: Daniele Alfredo Brambilla, Fausto Redigolo
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Publication number: 20140312878Abstract: Indexing a plurality of die obtainable from a material wafer comprising a plurality of stacked material layers. Each die is obtained in a respective position of the wafer. A manufacturing stage comprises at least two steps for treating a respective superficial portion of the material wafer that corresponds to a subset of said plurality of dies using the at least one lithographic mask through the exposition to the proper radiation in temporal succession. The method may include providing a die index on each die which is indicative of the position of the respective die by forming an external index indicative of the position of the superficial portion of the material wafer corresponding to the subset of the plurality of dies including said die and may comprise a plurality of electronic components electrically coupled to each other by means of a respective common control line.Type: ApplicationFiled: July 2, 2014Publication date: October 23, 2014Inventors: Daniele Alfredo BRAMBILLA, Fausto REDIGOLO
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Patent number: 8785930Abstract: Indexing a plurality of die obtainable from a material wafer comprising a plurality of stacked material layers. Each die is obtained in a respective position of the wafer. A manufacturing stage comprises at least two steps for treating a respective superficial portion of the material wafer that corresponds to a subset of said plurality of dies using the at least one lithographic mask through the exposition to the proper radiation in temporal succession. The method may include providing a die index on each die which is indicative of the position of the respective die by forming an external index indicative of the position of the superficial portion of the material wafer corresponding to the subset of the plurality of dies including said die and may comprise a plurality of electronic components electrically coupled to each other by means of a respective common control line.Type: GrantFiled: December 29, 2009Date of Patent: July 22, 2014Assignee: STMicroelectronics S.r.l.Inventors: Daniele Alfredo Brambilla, Fausto Redigolo
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Patent number: 7868474Abstract: A method of indexing a plurality of dice obtained from a material wafer comprising a plurality of stacked material layers, each die being obtained in a respective die position in the wafer, the method including providing a visible index on each die indicative of the respective die position, wherein providing the visible index on each die includes: forming in a first material layer of the die a reference structure adapted to defining a mapping of the wafer; and forming in a second material layer of the die a marker associated with the reference structure, a position of the marker with respect to the reference structure being adapted to provide an indication of the die position in the wafer.Type: GrantFiled: February 10, 2009Date of Patent: January 11, 2011Assignee: STMicroelectronics, S.r.l.Inventors: Daniele Alfredo Brambilla, Marco Natale Valtolina
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Publication number: 20100163871Abstract: An embodiment of a method for indexing a plurality of die obtainable from a material wafer comprising a plurality of stacked material layers is disclosed. Each die is obtained in a respective position of the wafer; the plurality of dies is obtained by means of a manufacturing process performed in at least one manufacturing stage using at least one lithographic mask for treating a surface of the material wafer trough an exposition to a proper radiation. Said at least one manufacturing stage comprises at least two steps for treating a respective superficial portion of the material wafer that corresponds to a subset of said plurality of dies using the at least one lithographic mask through the exposition to the proper radiation in temporal succession.Type: ApplicationFiled: December 29, 2009Publication date: July 1, 2010Applicant: STMICROELECTRONICS S.R.LInventors: Daniele Alfredo Brambilla, Fausto Redigolo
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Publication number: 20090146326Abstract: A method of indexing a plurality of dice obtained from a material wafer comprising a plurality of stacked material layers, each die being obtained in a respective die position in the wafer, the method including providing a visible index on each die indicative of the respective die position, wherein providing the visible index on each die includes: forming in a first material layer of the die a reference structure adapted to defining a mapping of the wafer; and forming in a second material layer of the die a marker associated with the reference structure, a position of the marker with respect to the reference structure being adapted to provide an indication of the die position in the wafer.Type: ApplicationFiled: February 10, 2009Publication date: June 11, 2009Applicant: STMICROELECTRONICS S.R.L.Inventors: Daniele Alfredo Brambilla, Marco Natale Valtolina
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Patent number: 7491620Abstract: A method of indexing a plurality of dice obtained from a material wafer comprising a plurality of stacked material layers, each die being obtained in a respective die position in the wafer, the method including providing a visible index on each die indicative of the respective die position, wherein providing the visible index on each die includes: forming in a first material layer of the die a reference structure adapted to defining a mapping of the wafer; and forming in a second material layer of the die a marker associated with the reference structure, a position of the marker with respect to the reference structure being adapted to provide an indication of the die position in the wafer.Type: GrantFiled: February 19, 2008Date of Patent: February 17, 2009Assignee: STMicroelectronics S.r.l.Inventors: Daniele Alfredo Brambilla, Marco Natale Valtolina
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Publication number: 20080153250Abstract: A method of indexing a plurality of dice obtained from a material wafer comprising a plurality of stacked material layers, each die being obtained in a respective die position in the wafer, the method including providing a visible index on each die indicative of the respective die position, wherein providing the visible index on each die includes: forming in a first material layer of the die a reference structure adapted to defining a mapping of the wafer; and forming in a second material layer of the die a marker associated with the reference structure, a position of the marker with respect to the reference structure being adapted to provide an indication of the die position in the wafer.Type: ApplicationFiled: February 19, 2008Publication date: June 26, 2008Applicant: STMicroelectronics S.r.l.Inventors: Daniele Alfredo Brambilla, Marco Natale Valtolina
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Patent number: 7348682Abstract: A method of indexing a plurality of dice obtained from a material wafer comprising a plurality of stacked material layers, each die being obtained in a respective die position in the wafer, the method including providing a visible index on each die indicative of the respective die position, wherein providing the visible index on each die includes: forming in a first material layer of the die a reference structure adapted to defining a mapping of the wafer; and forming in a second material layer of the die a marker associated with the reference structure, a position of the marker with respect to the reference structure being adapted to provide an indication of the die position in the wafer.Type: GrantFiled: April 19, 2005Date of Patent: March 25, 2008Assignee: STMicroelectronics S.r.l.Inventors: Daniele Alfredo Brambilla, Marco Natale Valtolina
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Patent number: 7166892Abstract: The on resistance per unit area of integration of a DMOS structure is reduced beyond the technological limits of a mask that is defined based upon the continuity of a heavily doped superficial silicon region along the axis of the elongated source island openings through the polysilicon gate layer in the width direction of the integrated structure. The mask no longer needs to be defined with a width (in the pitch direction) sufficiently large to account for the overlay of two distinct and relatively critical masks. These two masks are the source implant mask and the body contacting plug diffusion implant contact opening mask.Type: GrantFiled: December 6, 2004Date of Patent: January 23, 2007Assignee: STMicroelectronics S.r.l.Inventor: Daniele Alfredo Brambilla