Abstract: A non-volatile memory cell which can be easily integrated into processes for forming DRAM cells using trench capacitors is disclosed. The non-volatile memory cell comprises a transistor formed in a trench created below the top surface of the substrate. The transistor includes a U-shaped floating gate which lines the trench. A dielectric layer surrounds the floating gate, isolating it from the trench sidewalls and bottom as well as a control gate located in the inner trench formed by the floating gate. A buried diffusion region abuts the bottom of the floating gate. First and second diffusion regions are located on first and second sides of the trench. The first diffusion region is on the surface of the substrate while the second diffusion region extends from the surface and couples to the buried diffusion region. A wordline is coupled to the control gate.

Abstract: A non-volatile memory cell which can be easily integrated into processes for forming DRAM cells using trench capacitors is disclosed. The non-volatile memory cell comprises a transistor formed in a trench created below the top surface of the substrate. The transistor includes a U-shaped floating gate which lines the trench. A dielectric layer surrounds the floating gate, isolating it from the trench sidewalls and bottom as well as a control gate located in the inner trench formed by the floating gate. A buried diffusion region abuts the bottom of the floating gate. First and second diffusion regions are located on first and second sides of the trench. The first diffusion region is on the surface of the substrate while the second diffusion region extends from the surface and couples to the buried diffusion region. A wordline is coupled to the control gate.