Patents by Inventor Daniele Zompi

Daniele Zompi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7663927
    Abstract: A reference voltage generator for a matrix of non-volatile memory cells of the EEPROM type, comprises at least one array enabled by an access transistor. The array comprises at least one reference cell associated with a relative select transistor, the transistors and the cell being realized on a semiconductor substrate and having active regions delimited by suitable field oxide regions and covered by a tunnel oxide layer and comprising at least one floating gate realized by a first polysilicon layer and covered by a dielectric layer and by a second polysilicon layer. Advantageously, the floating gate of the reference cells is contacted by a first contact terminal connected to a discharge transistor for the periodical discharge of possibly present charges. A process manufactures such a voltage generator.
    Type: Grant
    Filed: November 16, 2007
    Date of Patent: February 16, 2010
    Assignee: STMicroelectronics S.r.l.
    Inventors: Elisabetta Palumbo, Paola Zuliani, Roberto Annunziata, Daniele Zompi
  • Publication number: 20080123404
    Abstract: A reference voltage generator for a matrix of non-volatile memory cells of the EEPROM type, comprises at least one array enabled by an access transistor. The array comprises at least one reference cell associated with a relative select transistor, the transistors and the cell being realized on a semiconductor substrate and having active regions delimited by suitable field oxide regions and covered by a tunnel oxide layer and comprising at least one floating gate realized by a first polysilicon layer and covered by a dielectric layer and by a second polysilicon layer. Advantageously, the floating gate of the reference cells is contacted by a first contact terminal connected to a discharge transistor for the periodical discharge of possibly present charges. A process manufactures such a voltage generator.
    Type: Application
    Filed: November 16, 2007
    Publication date: May 29, 2008
    Applicant: STMICROELECTRONICS S.R.L.
    Inventors: Elisabetta Palumbo, Paola Zuliani, Roberto Annunziata, Daniele Zompi
  • Publication number: 20050195637
    Abstract: A biasing structure for a memory cell storage element, for setting an operating voltage at an accession electrode of the memory cell storage element. The biasing structure includes a biasing transistor coupled to the accession electrode and adapted to set the operating voltage based on a biasing voltage received at a control electrode of the biasing transistor, and a biasing voltage generator for generating the biasing voltage. The biasing voltage generator includes a feedback voltage regulation structure adapted track changes in a threshold voltage of the biasing transistor, so as to keep the operating voltage at the accession electrode of the memory cell storage element substantially stable against operating condition changes.
    Type: Application
    Filed: February 22, 2005
    Publication date: September 8, 2005
    Inventors: Jose Martino, Enrico Castaldo, Nicolas Demange, Daniele Zompi