Abstract: An integrated demodulator tuning circuit (10, 60) receives differential currents at input terminals (12, 46) and provides an AFC signal at an output terminal (48). The AFC current characteristic has a dead band (72) in the output current generated when the integrated demodulator tuning circuit (10, 60) operates under the condition where the difference between the currents supplied at the input terminals (12 and 46) is at or below a set threshold value. The set threshold value is determined by the relative sizes of the transistors (14, 16 and 20, 36, 38 and 40) that form the current mirrors connected to the input terminals (12, 46).

Abstract: A demodulator circuit (10) having harmonic cancelling receives an input signal (IF) and generates an oscillator signal (OSC) in an oscillator circuit (14). The oscillator signal (OSC) is locked to the same frequency and phase as the input signal (IF). A phase shift circuit (18) generates a shifted signal (OSC SHIFTED) that is in quadrature with the oscillator signal (OSC). A multiplier (22) receives the oscillator signal (OSC) and the shifted signal (OSC SHIFTED) and generates an output signal (2IF) having twice the frequency of the oscillator signal (OSC). A multiplier circuit (24) also receives the input signal (IF) and along with the oscillator signal (OSC) generates an output signal (PD). The signals generated by the multiplier (22) and the multiplier circuit (24) are summed in a summing circuit (30) that supplies an output signal (OUT).

Abstract: A mixer circuit (21) includes first (31) and second (32) transconductance amplifiers, a switching circuit (34), and an oscillator processing stage (36). The transconductance amplifiers (31,32) generate differential current signals in response to modulated signals having different carrier frequencies. The oscillator processing stage (36) generates a local oscillator signal from a reference oscillator signal. The switching circuit (34) switches the differential current signals at the frequency of local oscillator signal to generate an intermediate frequency output signal.

Abstract: An integrated demodulator tuning circuit (10, 60) receives differential currents at input terminals (12, 46) and provides an AFC signal at an output terminal (48). The AFC current characteristic has a dead band (72) in the output current generated when the integrated demodulator tuning circuit (10, 60) operates under the condition where the difference between the currents supplied at the input terminals (12 and 46) is at or below a set threshold value. The set threshold value is determined by the relative sizes of the transistors (14, 16 and 20, 36, 38 and 40) that form the current mirrors connected to the input terminals (12, 46).

Abstract: A demodulator circuit (10) having harmonic cancelling receives an input signal (IF) and generates an oscillator signal (OSC) in an oscillator circuit (14). The oscillator signal (OSC) is locked to the same frequency and phase as the input signal (IF). A phase shift circuit (18) generates a shifted signal (OSC SHIFTED) that is in quadrature with the oscillator signal (OSC). A multiplier (22) receives the oscillator signal (OSC) and the shifted signal (OSC SHIFTED) and generates an output signal (21F) having twice the frequency of the oscillator signal (OSC). A multiplier circuit (24) also receives the input signal (IF) and along with the oscillator signal (OSC) generates an output signal (PD). The signals generated by the multiplier (22) and the multiplier circuit (24) are summed in a summing circuit (30) that supplies an output signal (OUT).

Abstract: A temperature compensation circuit converts a control signal (IG) that has an undesirable temperature coefficient to a temperature compensated control signal (I32) having a desirable temperature coefficient. In one embodiment, four transistors (60, 64, 68, and 72) are configured to convert the control signal (IG) having an undesirable temperature coefficient to the temperature compensated control signal (I32) having the desired temperature coefficient. Additional embodiments use components to refine the temperature compensation process.

Abstract: A demodulator circuit (10) includes an oscillator (12) and an injection circuit (14). An Automatic Frequency Control (AFC) signal adjusts the tail current of a current source (28) provided in the oscillator (12) and the tail current of a current source (44) provided in the injection circuit (14). A phase detector (16) compares the phase of the signal generated by the oscillator (12) with the phase of the injected input signal. The phase detector (16) generates an output signal V0 having a value of zero when the input signal is in quadrature with the signal generated by the oscillator (12), but generates a non-zero signal that is used to adjust the AFC signal when the input signal and the signal generated by the oscillator (12) are not in quadrature.

Abstract: A temperature compensation circuit converts a control signal (IG) that has an undesirable temperature coefficient to a temperature compensated control signal (I32) having a desirable temperature coefficient. In one embodiment, four transistors (60, 64, 68, and 72) are configured to convert the control signal (IG) having an undesirable temperature coefficient to the temperature compensated control signal (I32) having the desired temperature coefficient. Additional embodiments use components to refine the temperature compensation process.

Abstract: An improved logarithmic amplifier (100) and method in which a signal at an output (106) is logarithmic with respect to the voltage supplied at a gain control input (102). The logarithmic amplifier (100) includes a first amplifier stage (110) and a second amplifier stage (130) which are coupled together by a current mirror stage (120). Alternative embodiments of logarithmic amplifier (200) and (300) include different biasing methods for biasing the second amplifier stage (130).

Abstract: A transconductance amplifier (67) includes a multiple-stage amplifier (99) for amplifying an Intermediate Frequency (IF) signal. The transconductance amplifier includes a feedback path (103) having a resistance (105) for providing a feedback signal from an output of the multiple-stage amplifier (99) to an input of the multiple-stage amplifier (99). The resistance (105) of the feedback path (103) is selected so that an input impedance of the transconductance amplifier is equal to a source impedance at an input terminal (82) of the transconductance amplifier (67) and an output impedance of the transconductance amplifier (67) is equal to a load impedance at an output terminal (84) of the transconductance amplifier (67).

Abstract: A correction circuit (10) includes a transistor (30) that generates a feedback signal for equalizing the amplitude and adjusting the phase of the output signals (V.sub.OUT- and V.sub.OUT+) that are provided at the output of the variable gain amplifier (10). The base terminal of the transistor (30) receives a summed value of the output signals (V.sub.OUT- and V.sub.OUT+). The summed value is inverted and fed back to the differential transistors (12 and 14) and combined with the output signals (V.sub.OUT- and V.sub.OUT+). The output signals (V.sub.OUT- and V.sub.OUT+) have a proper amplitude and phase relationship when the summed value is substantially zero.