Patents by Inventor Danielle N. Devereaux

Danielle N. Devereaux has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Retry based protocol with source/receiver FIFO recovery and anti-starvation mechanism to support dynamic pipeline lengthening for ECC error correction
    Patent number: 8943379
    Abstract: Methods and apparatus relating to retry based protocol with source/receiver FIFO (First-In, First-Out) buffer recovery and anti-starvation mechanism to support dynamic pipeline lengthening for ECC error correction are described. In an embodiment, upon detection of an error, a portion of transmitted data is stored in one or more storage devices before retransmission. Other embodiments are also described and claimed.
    Type: Grant
    Filed: December 26, 2010
    Date of Patent: January 27, 2015
    Assignee: Intel Corporation
    Inventors: James R. Vash, Danielle N. Devereaux, Scott J. Erlanger, Robert E. Faber
  • RETRY BASED PROTOCOL WITH SOURCE/RECEIVER FIFO RECOVERY AND ANTI-STARVATION MECHANISM TO SUPPORT DYNAMIC PIPELINE LENGTHENING FOR ECC ERROR CORRECTION
    Publication number: 20110161769
    Abstract: Methods and apparatus relating to retry based protocol with source/receiver FIFO (First-In, First-Out) buffer recovery and anti-starvation mechanism to support dynamic pipeline lengthening for ECC error correction are described. In an embodiment, upon detection of an error, a portion of transmitted data is stored in one or more storage devices before retransmission. Other embodiments are also described and claimed.
    Type: Application
    Filed: December 26, 2010
    Publication date: June 30, 2011
    Inventors: James R. Vash, Danielle N. Devereaux, Scott J. Erlanger, Robert E. Faber