Patents by Inventor Danish Jawed

Danish Jawed has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250322129
    Abstract: An example is a non-transitory computer-readable storage medium including stored instructions. The instructions, which when executed by one or more processors, cause the one or more processors to: obtain an assignment of an assigned bucket; generate stimulus values targeting one or more uncovered bins of the assigned bucket; simulate operation of a circuit design using the stimulus values; determine whether the assigned bucket has been covered by the simulated operation of the circuit design; and expand a size of the assigned bucket following a determination that the assigned bucket has been covered. The assigned bucket, as assigned, has a subset of bins of a functional coverage space.
    Type: Application
    Filed: January 30, 2024
    Publication date: October 16, 2025
    Inventors: Danish Jawed, Parijat Biswas, Badri Prasad Gopalan, Minakshi Chakravorty
  • Publication number: 20250068812
    Abstract: A description of stimuli used for functional verification of a circuit design is received. The description includes classes of variables and the variable include random variables. A coverage model for the functional verification of the circuit design is also received. The coverage model includes coverage targets that are functions of the variables. A processing device generates stimuli for multiple iterations of the functional verification, as follows. Context values, which include values of the random variables for the stimuli, are maintained. The values of the random variables in an individual class are randomized, and the randomization of the random variables in the individual class is biased to hit the coverage targets given the context values for the random variables outside the individual class. Whether the coverage targets are hit by the generated stimuli is determined.
    Type: Application
    Filed: August 25, 2023
    Publication date: February 27, 2025
    Inventors: Parijat Biswas, Danish Jawed, Siddarth Sharma, Badri Prasad Gopalan
  • Patent number: 11983474
    Abstract: A method for verifying an integrated circuit (IC) design described in a hardware description or hardware verification language (HDHVL) is provided. The method includes identifying connections between random variables and coverage areas of the IC design, as described in HDHVL code, the connections being identified by determining which coverage areas of the IC design will be influenced during simulation by which random variables. The method can further include storing the identified connections in a database, and using, by a processor, connections retrieved from the database to simulate and verify the coverage areas of the IC design.
    Type: Grant
    Filed: December 23, 2021
    Date of Patent: May 14, 2024
    Assignee: Synopsys, Inc.
    Inventors: Parijat Biswas, Badri Gopalan, Enzhi Ni, Danish Jawed, Ying Chen, Jiang Chen
  • Patent number: 10831961
    Abstract: A data analysis engine is implemented in a testbench to improve coverage convergence during simulation of a device-under-validation (DUV). During a first simulation phase initial stimulus data is generated according to initial random variables based on user-provided constraint parameters. The data analysis engine then uses a time-based technique to match coverage variables sampled from simulation response data with corresponding initial random variables, determines a functional dependency (relationship) between the sampled coverage variables and corresponding initial random variables, then automatically generates revised constraint parameters based on the functional dependency. The revised constraint parameters are then used during a second simulation phase to generate focused random variables used to stimulate the DUV to reach additional coverage variables. In one embodiment, the functional dependency is determined by cross-correlating sampled coverage variables and corresponding initial random variables.
    Type: Grant
    Filed: July 12, 2019
    Date of Patent: November 10, 2020
    Assignee: Synopsys, Inc.
    Inventors: Esha Dutta, Danish Jawed, Bhaskar Pal, Parijat Biswas, Pravash Chandra Dash, Rajarshi Mukherjee, Sharad Gaur
  • Publication number: 20200019664
    Abstract: A data analysis engine is implemented in a testbench to improve coverage convergence during simulation of a device-under-validation (DUV). During a first simulation phase initial stimulus data is generated according to initial random variables based on user-provided constraint parameters. The data analysis engine then uses a time-based technique to match coverage variables sampled from simulation response data with corresponding initial random variables, determines a functional dependency (relationship) between the sampled coverage variables and corresponding initial random variables, then automatically generates revised constraint parameters based on the functional dependency. The revised constraint parameters are then used during a second simulation phase to generate focused random variables used to stimulate the DUV to reach additional coverage variables. In one embodiment, the functional dependency is determined by cross-correlating sampled coverage variables and corresponding initial random variables.
    Type: Application
    Filed: July 12, 2019
    Publication date: January 16, 2020
    Applicant: Synopsys, Inc.
    Inventors: Esha Dutta, Danish Jawed, Bhaskar Pal, Parijat Biswas, Pravash Chandra Dash, Rajarshi Mukherjee, Sharad Gaur