Patents by Inventor Dann MORILLON

Dann MORILLON has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • MOS TRANSISTOR HAVING SUBSTANTIALLY PARALLELPIPED-SHAPED INSULATING SPACERS
    Publication number: 20250040165
    Abstract: A MOS transistor including a substrate, a conductive having lateral walls, drain and source regions, and spacers having an upper surface such that the spacers are buried in the substrate and are position between the conductive gate and the drain and source regions is provided. The spacers are each cuboid-shaped and have a width that is constant along the spacers height and independent from a height of the conductive gate. A device including the MOS transistor and a method of manufacture for producing a right-hand portion and a left-hand portion of a MOS transistor is also provided.
    Type: Application
    Filed: October 9, 2024
    Publication date: January 30, 2025
    Applicant: STMicroelectronics (Rousset) SAS
    Inventors: Arnaud REGNIER, Dann MORILLON, Franck JULIEN, Marjorie HESSE
  • MOS transistor having substantially parallelepiped-shaped insulating spacers
    Patent number: 12125899
    Abstract: A method of manufacturing a MOS transistor includes forming a conductive first gate and forming insulating spacers along opposite sides of the gate, wherein the spacers are formed before the gate.
    Type: Grant
    Filed: February 19, 2021
    Date of Patent: October 22, 2024
    Assignee: STMICROELECTRONICS (ROUSSET) SAS
    Inventors: Arnaud Regnier, Dann Morillon, Franck Julien, Marjorie Hesse
  • MOS TRANSISTOR SPACERS AND METHOD OF MANUFACTURING THE SAME
    Publication number: 20210175346
    Abstract: A method of manufacturing a MOS transistor includes forming a conductive first gate and forming insulating spacers along opposite sides of the gate, wherein the spacers are formed before the gate.
    Type: Application
    Filed: February 19, 2021
    Publication date: June 10, 2021
    Applicant: STMICROELECTRONICS (ROUSSET) SAS
    Inventors: Arnaud REGNIER, Dann MORILLON, Franck JULIEN, Marjorie HESSE
  • Method of manufacturing MOS transistor spacers
    Patent number: 10930757
    Abstract: A method of manufacturing a MOS transistor includes forming a conductive first gate and forming insulating spacers along opposite sides of the gate, wherein the spacers are formed before the gate.
    Type: Grant
    Filed: December 20, 2018
    Date of Patent: February 23, 2021
    Assignee: STMICROELECTRONICS (ROUSSET) SAS
    Inventors: Arnaud Regnier, Dann Morillon, Franck Julien, Marjorie Hesse
  • MOS TRANSISTOR SPACERS AND METHOD OF MANUFACTURING THE SAME
    Publication number: 20190207014
    Abstract: A method of manufacturing a MOS transistor includes forming a conductive first gate and forming insulating spacers along opposite sides of the gate, wherein the spacers are formed before the gate.
    Type: Application
    Filed: December 20, 2018
    Publication date: July 4, 2019
    Inventors: Arnaud REGNIER, Dann MORILLON, Franck JULIEN, Marjorie HESSE