Abstract: The invention is a new method for erasing a flash EEPROM memory device. The memory device has a first semiconductor region within a second semiconductor region, source and drain regions in the first semiconductor region, a well terminal inside the first semiconductor region, a charge storing layer electrically isolated from the first semiconductor region by a dielectric layer, and a control terminal electrically isolated from the charge storing layer by a inter layer dielectric. The method comprises the steps of: applying a first voltage bias of first polarity to the well terminal; allowing a first time period to elapse; applying a second voltage bias of second polarity opposite to the first polarity to the control terminal; resetting the first voltage bias to zero; allowing a second time period to elapse; and resetting the second voltage bias to zero.

Abstract: The invention is a new method for erasing a flash EEPROM memory device. The memory device has a first semiconductor region within a second semiconductor region, source and drain regions in the first semiconductor region, a well terminal inside the first semiconductor region, a charge storing layer electrically isolated from the first semiconductor region by a dielectric layer, and a control terminal electrically isolated from the charge storing layer by a inter layer dielectric. The method comprises the steps of: applying a first voltage bias of first polarity to the well terminal; allowing a first time period to elapse; applying a second voltage bias of second polarity opposite to the first polarity to the control terminal; resetting the first voltage bias to zero; allowing a second time period to elapse; and resetting the second voltage bias to zero.