Patents by Inventor Danny E. Mars

Danny E. Mars has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9806111
    Abstract: Nanostructure array optoelectronic devices are disclosed. The optoelectronic device may have one or more intermediate electrical contacts that are physically and electrically connected to sidewalls of the array of nanostructures. The contacts may allow different photo-active regions of the optoelectronic device to be independently controlled. For example, one color light may be emitted or detected independently of another using the same group of one or more nanostructures. The optoelectronic device may be a pixilated device that may serve as an LED display or imaging sensor. The pixilated device may have an array of nanostructures with alternating rows and columns of sidewall electrical contacts at different layers. A pixel may be formed at the intersection of a row contact and a column contact. As one example, a single group of one or more nanostructures has a blue sub-pixel, a green sub-pixel, and a red sub-pixel.
    Type: Grant
    Filed: January 16, 2014
    Date of Patent: October 31, 2017
    Assignee: Sundiode Inc.
    Inventors: James C. Kim, Sungsoo Yi, Danny E. Mars
  • Publication number: 20140134769
    Abstract: Nanostructure array optoelectronic devices are disclosed. The optoelectronic device may have one or more intermediate electrical contacts that are physically and electrically connected to sidewalls of the array of nanostructures. The contacts may allow different photo-active regions of the optoelectronic device to be independently controlled. For example, one color light may be emitted or detected independently of another using the same group of one or more nanostructures. The optoelectronic device may be a pixilated device that may serve as an LED display or imaging sensor. The pixilated device may have an array of nanostructures with alternating rows and columns of sidewall electrical contacts at different layers. A pixel may be formed at the intersection of a row contact and a column contact. As one example, a single group of one or more nanostructures has a blue sub-pixel, a green sub-pixel, and a red sub-pixel.
    Type: Application
    Filed: January 16, 2014
    Publication date: May 15, 2014
    Applicant: Sundiode Inc.
    Inventors: James C. Kim, Sungsoo Yi, Danny E. Mars
  • Patent number: 8659037
    Abstract: Nanostructure array optoelectronic devices are disclosed. The optoelectronic device may have one or more intermediate electrical contacts that are physically and electrically connected to sidewalls of the array of nanostructures. The contacts may allow different photo-active regions of the optoelectronic device to be independently controlled. For example, one color light may be emitted or detected independently of another using the same group of one or more nanostructures. The optoelectronic device may be a pixilated device that may serve as an LED display or imaging sensor. The pixilated device may have an array of nanostructures with alternating rows and columns of sidewall electrical contacts at different layers. A pixel may be formed at the intersection of a row contact and a column contact. As one example, a single group of one or more nanostructures has a blue sub-pixel, a green sub-pixel, and a red sub-pixel.
    Type: Grant
    Filed: June 8, 2010
    Date of Patent: February 25, 2014
    Assignee: Sundiode Inc.
    Inventors: James C. Kim, Sungsoo Yi, Danny E. Mars
  • Patent number: 8476637
    Abstract: Nanostructure array optoelectronic devices are disclosed. The optoelectronic device may have a top electrical contact that is physically and electrically connected to sidewalls of the array of nanostructures (e.g., nanocolumns). The top electrical contact may be located such that light can enter or leave the nanostructures without passing through the top electrical contact. Therefore, the top electrical contact can be opaque to light having wavelengths that are absorbed or generated by active regions in the nanostructures. The top electrical contact can be made from a material that is highly conductive, as no tradeoff needs to be made between optical transparency and electrical conductivity. The device could be a solar cell, LED, photo-detector, etc.
    Type: Grant
    Filed: June 8, 2010
    Date of Patent: July 2, 2013
    Assignee: Sundiode Inc.
    Inventors: James C. Kim, Sungsoo Yi, Danny E. Mars
  • Patent number: 8431817
    Abstract: Nanostructure array optoelectronic devices are disclosed. The optoelectronic device may be a multi junction solar cell. The optoelectronic device may have a bi-layer electrical interconnect that is physically and electrically connected to sidewalls of the array of nanostructures. The optoelectronic device may be operated as a multi junction solar cell, wherein each junction is associated with one portion of the device. The bi-layer electrical interconnect allows current to pass from one portion to the next. Thus, the bi-layer electrical interconnect may serve as a replacement for a tunnel junction, which is used in some conventional multi junction solar cells.
    Type: Grant
    Filed: June 8, 2010
    Date of Patent: April 30, 2013
    Assignee: Sundiode Inc.
    Inventors: James C. Kim, Sungsoo Yi, Danny E. Mars
  • Publication number: 20120025169
    Abstract: Transistors and methods for forming transistors from groups of nanostructures are disclosed herein. The transistor may be formed from an array of nanostructures that are grown vertically on a substrate. The nanostructures may have lower, middle and upper segments that may be formed with different materials and/or doping to achieve desired effects. Collectively, the lower segments may form the source or drain, with the middle segments collectively forming the channel. Alternatively, the lower segments could collectively form the emitter or collector, with the middle segments collectively forming the base. Transistor electrodes may be planar metal structures that surround sidewalls of the nanostructures. The transistors may be Field Effect Transistors (FETs) or bipolar junction transistors (BJTs). Heterojunction bipolar junction transistors (HBTs) and high electron mobility transistors (HEMTs) are possible.
    Type: Application
    Filed: August 2, 2010
    Publication date: February 2, 2012
    Applicant: SUNDIODE INC.
    Inventors: Danny E. Mars, James C. Kim, Sungsoo Yi
  • Publication number: 20110299074
    Abstract: Nanostructure array optoelectronic devices are disclosed. The optoelectronic device may have one or more intermediate electrical contacts that are physically and electrically connected to sidewalls of the array of nanostructures. The contacts may allow different photo-active regions of the optoelectronic device to be independently controlled. For example, one color light may be emitted or detected independently of another using the same group of one or more nanostructures. The optoelectronic device may be a pixilated device that may serve as an LED display or imaging sensor. The pixilated device may have an array of nanostructures with alternating rows and columns of sidewall electrical contacts at different layers. A pixel may be formed at the intersection of a row contact and a column contact. As one example, a single group of one or more nanostructures has a blue sub-pixel, a green sub-pixel, and a red sub-pixel.
    Type: Application
    Filed: June 8, 2010
    Publication date: December 8, 2011
    Applicant: SUNDIODE INC.
    Inventors: James C. Kim, Sungsoo Yi, Danny E. Mars
  • Publication number: 20110297214
    Abstract: Nanostructure array optoelectronic devices are disclosed. The optoelectronic device may be a multi junction solar cell. The optoelectronic device may have a bi-layer electrical interconnect that is physically and electrically connected to sidewalls of the array of nanostructures. The optoelectronic device may be operated as a multi junction solar cell, wherein each junction is associated with one portion of the device. The bi-layer electrical interconnect allows current to pass from one portion to the next. Thus, the bi-layer electrical interconnect may serve as a replacement for a tunnel junction, which is used in some conventional multi junction solar cells.
    Type: Application
    Filed: June 8, 2010
    Publication date: December 8, 2011
    Applicant: SUNDIODE INC.
    Inventors: James C. Kim, Sungsoo Yi, Danny E. Mars
  • Publication number: 20110297913
    Abstract: Nanostructure array optoelectronic devices are disclosed. The optoelectronic device may have a top electrical contact that is physically and electrically connected to sidewalls of the array of nanostructures (e.g., nanocolumns). The top electrical contact may be located such that light can enter or leave the nanostructures without passing through the top electrical contact. Therefore, the top electrical contact can be opaque to light having wavelengths that are absorbed or generated by active regions in the nanostructures. The top electrical contact can be made from a material that is highly conductive, as no tradeoff needs to be made between optical transparency and electrical conductivity. The device could be a solar cell, LED, photo-detector, etc.
    Type: Application
    Filed: June 8, 2010
    Publication date: December 8, 2011
    Applicant: SUNDIODE INC.
    Inventors: James C. Kim, Sungsoo Yi, Danny E. Mars
  • Patent number: 7123638
    Abstract: A tunnel junction structure comprises an n-type tunnel junction layer of a first semiconductor material, a p-type tunnel junction layer of a second semiconductor material and a tunnel junction between the tunnel junction layers. The first semiconductor material includes gallium (Ga), nitrogen (N), arsenic (As) and is doped with a Group VI dopant. The probability of tunneling is significantly increased, and the voltage drop across the tunnel junction is consequently decreased, by forming the tunnel junction structure of materials having a reduced difference between the valence band energy of the material of the p-type tunnel junction layer and the conduction band energy of the n-type tunnel junction layer. Doping the first semiconductor material n-type with a Group VI dopant maximizes the doping concentration in the first semiconductor material, thus further improving the probability of tunneling.
    Type: Grant
    Filed: October 17, 2003
    Date of Patent: October 17, 2006
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: Michael Howard Leary, Danny E. Mars, Sungwon David Roh, Danielle R. Chamberlin, Ying-Lan Chang
  • Patent number: 6878959
    Abstract: The group III-V semiconductor device comprises a quantum well layer, barrier layers sandwiching the quantum well layer and a region of a third semiconductor material formed by spatially-selective intermixing of atoms on the group V sublattice between the first semiconductor material of the quantum well layer and the second semiconductor material of the barrier layer. The quantum well layer is a layer of a first semiconductor material that has a band gap energy and a refractive index. The barrier layers are layers of a second semiconductor material that has a higher band gap energy and a lower refractive index than the first semiconductor material. The third semiconductor material has a band gap energy and a refractive index intermediate between the band gap energy and the refractive index, respectively, of the first semiconductor material and the second semiconductor material.
    Type: Grant
    Filed: November 22, 2002
    Date of Patent: April 12, 2005
    Assignee: Agilent Technologies, Inc.
    Inventors: David P. Bour, Ying-Lan Chang, Tetsuya Takeuchi, Danny E. Mars
  • Patent number: 6853663
    Abstract: An optical semiconductor device having an active layer for generating light via the recombination of holes and electrons therein. The active layer is part of a plurality of semiconductor layers including an n-p junction between an n-type layer and a p-type layer. The active layer has a polarization field therein having a field direction that depends on the orientation of the active layer when the active layer is grown. In the present invention, the polarization field in the active layer has an orientation such that the polarization field is directed from the n-layer to the p-layer.
    Type: Grant
    Filed: December 21, 2001
    Date of Patent: February 8, 2005
    Assignee: Agilent Technologies, Inc.
    Inventors: Ghulam Hasnain, Richard P. Schneider, Scott W. Corzine, Mark Hueschen, Tetsuya Takeuchi, Danny E. Mars
  • Publication number: 20040161006
    Abstract: An InGaAsN semiconductor light-emitting device containing one or more barrier layers is designed to prevent diffusion of one or more elements out of the quantum well. In one embodiment, the barrier layer can either contain nitrogen in substantially the same concentration as the InGaAsN layer or contain two or more group III elements in combination with nitrogen, where the fractional composition of the two or more group III elements and nitrogen is designed to minimize out-diffusion of nitrogen from the quantum well. In other embodiments, the barrier layer can contain indium and gallium to minimize In/Ga intermixing at the heterointerface to the quantum well. In further embodiments, a compressive-strained or lattice-matched intermediate layer can be added between the InGaAsN quantum well and a tensile-strained barrier layer to minimize strain-related out-diffusion of nitrogen.
    Type: Application
    Filed: February 18, 2003
    Publication date: August 19, 2004
    Inventors: Ying-Lan Chang, Tetsuya Takeuchi, Danny E. Mars, David P. Bour, Michael R.T. Tan
  • Patent number: 6756018
    Abstract: A microfluidic system for steering subject materials to a next processing region includes a substrate having at least one embedded gas generator that is activated in response to the result of an initial process, whereby a gas is formed having pressure to steer the subject materials to the next processing region. The gas generator includes resistors that are electrically activated. As current passes through the resistors, thermal energy is released to decompose a selected material from a solid or liquid state to gaseous state. In an alternative embodiment, a gas generator is activated in response to an external control.
    Type: Grant
    Filed: February 12, 2001
    Date of Patent: June 29, 2004
    Assignee: Agilent Technologies, Inc.
    Inventors: Ken A. Nishimura, Danny E. Mars
  • Publication number: 20040099856
    Abstract: The group III-V semiconductor device comprises a quantum well layer, barrier layers sandwiching the quantum well layer and a region of a third semiconductor material formed by spatially-selective intermixing of atoms on the group V sublattice between the first semiconductor material of the quantum well layer and the second semiconductor material of the barrier layer. The quantum well layer is a layer of a first semiconductor material that has a band gap energy and a refractive index. The barrier layers are layers of a second semiconductor material that has a higher band gap energy and a lower refractive index than the first semiconductor material. The third semiconductor material has a band gap energy and a refractive index intermediate between the band gap energy and the refractive index, respectively, of the first semiconductor material and the second semiconductor material.
    Type: Application
    Filed: November 22, 2002
    Publication date: May 27, 2004
    Inventors: David P. Bour, Ying-Lan Chang, Tetsuya Takeuchi, Danny E. Mars
  • Publication number: 20020137229
    Abstract: A microfluidic system for steering subject materials to a next processing region includes a substrate having at least one embedded gas generator that is activated in response to the result of an initial process, whereby a gas is formed having pressure to steer the subject materials to the next processing region. The gas generator includes resistors that are electrically activated. As current passes through the resistors, thermal energy is released to decompose a selected material from a solid or liquid state to gaseous state. In an alternative embodiment, a gas generator is activated in response to an external control.
    Type: Application
    Filed: February 12, 2001
    Publication date: September 26, 2002
    Inventors: Ken A. Nishimura, Danny E. Mars
  • Publication number: 20020110172
    Abstract: An optical semiconductor device having an active layer for generating light via the recombination of holes and electrons therein. The active layer is part of a plurality of semiconductor layers including an n-p junction between an n-type layer and a p-type layer. The active layer has a polarization field therein having a field direction that depends on the orientation of the active layer when the active layer is grown. In the present invention, the polarization field in the active layer has an orientation such that the polarization field is directed from the n-layer to the p-layer.
    Type: Application
    Filed: December 21, 2001
    Publication date: August 15, 2002
    Inventors: Ghulam Hasnain, Richard P. Schneider, Scott W. Corzine, Mark Hueschen, Tetsuya Takeuchi, Danny E. Mars
  • Patent number: 6155699
    Abstract: A light emitting device and a method of fabricating the device include a wavelength selective reflector that is formed between a light source and a layer of phosphorescent material. The light emitting device is a phosphor-conversion light emitting diode (LED) that outputs secondary light that is converted from primary light emitted from the light source. In the preferred embodiment, the light source is a Gallium Nitride (GaN) die and the wavelength selective reflector is a distributed Bragg reflector (DBR) mirror. The DBR mirror is comprised of multiple alternating layers of high and low refractive index materials. The high refractive index material may be Titanium Dioxide (TiO.sub.2) and the low refractive index material may be Silicon Dioxide (SiO.sub.2). An encapsulating layer over the GaN die provides a distance between the GaN die and the DBR mirror. Preferably, the encapsulating layer is a dome-shaped structure and the DBR mirror forms a dome-shaped shell over the encapsulating layer.
    Type: Grant
    Filed: March 15, 1999
    Date of Patent: December 5, 2000
    Assignee: Agilent Technologies, Inc.
    Inventors: Jeffrey N. Miller, Danny E. Mars
  • Patent number: 5805624
    Abstract: A vertical cavity surface emitting laser (VCSEL) that generates light having a desired wavelength, greater than one micron. The laser comprises a substrate, a lower mirror region, an active region and an upper mirror region. The substrate consists essentially of GaAs. The lower mirror region is adjacent the substrate and is lattice matched to the substrate. The active region is sandwiched between the upper and lower mirror regions, and includes a central quantum well region and a gallium arsenide layer sandwiched between the quantum well region and each of the lower mirror region and the upper mirror region. The central quantum well region includes a quantum well layer consisting essentially of GaN.sub.x As.sub.(1-x). The GaN.sub.x As.sub.(1-x) of the quantum well layer has a lattice constant and a band gap dependent on x. The value of x sets the bandgap of the GaN.sub.x As.sub.(1-x) of the quantum well layer to a value corresponding to light generation at the desired wavelength, greater than one micron.
    Type: Grant
    Filed: July 30, 1996
    Date of Patent: September 8, 1998
    Assignee: Hewlett-Packard Company
    Inventors: Long Yang, Danny E. Mars
  • Patent number: 5376229
    Abstract: A method for processing coplanar semiconductor devices of different types as provided. The method includes the steps of: forming a first layer for formation of a first device region on a substrate, forming an epitaxial semiconductor lift-off layer above the first device region, removing a portion of the first device region to open areas for the formation of the second device region, depositing epitaxially a second device region, and removing the liftoff layer to leave the first and second device regions remaining on the substrate.
    Type: Grant
    Filed: October 5, 1993
    Date of Patent: December 27, 1994
    Inventors: Jeffrey N. Miller, Steven D. Lester, Danny E. Mars