Abstract: A bi-directional transient voltage suppression device with symmetric current-voltage characteristics has a lower semiconductor layer of first conductivity type, an upper semiconductor layer of first conductivity type, and a middle semiconductor layer adjacent to and disposed between the lower and upper layers having a second opposite conductivity type, such that upper and lower p−n junctions are formed. The middle layer has a net doping concentration that is highest at a midpoint between the junctions. Furthermore, the doping profile along a line normal to the lower, middle and upper layers is such that, within the middle layer the doping profile on one side of a centerplane of the middle layer mirrors the doping profile on an opposite side. In addition, an integral of the net doping concentration of the middle layer taken over the distance between the junctions is such that breakdown, when it occurs, is punch through breakdown, rather than avalanche breakdown.

Abstract: A bi-directional transient voltage suppression device with symmetric current-voltage characteristics is provided. The device comprises: (a) a lower semiconductor layer of first conductivity type; (b) an upper semiconductor layer of first conductivity type; and (b) a middle semiconductor layer adjacent to and disposed between the lower and upper layers, the middle layer having a second conductivity type opposite the first conductivity type, such that upper and lower p−n junctions are formed. In this device, the middle layer has a net doping concentration that is highest at a midpoint between the junctions. Furthermore, the doping profile along a line normal to the lower, middle and upper layers is such that, within the middle layer and within at least a portion of the lower and upper layers, the doping profile on one side of a centerplane of the middle layer mirrors the doping profile on an opposite side of the centerplane.

Abstract: A bi-directional transient voltage suppression device with symmetric current-voltage characteristics has a lower semiconductor layer of first conductivity type, an upper semiconductor layer of first conductivity type, and a middle semiconductor layer adjacent to and disposed between the lower and upper layers having a second opposite conductivity type, such that upper and lower p-n junctions are formed. The middle layer has a net doping concentration that is highest at a midpoint between the junctions. Furthermore, the doping profile along a line normal to the lower, middle and upper layers is such that, within the middle layer the doping profile on one side of a centerplane of the middle layer mirrors the doping profile on an opposite side. In addition, an integral of the net doping concentration of the middle layer taken over the distance between the junctions is such that breakdown, when it occurs, is punch through breakdown, rather than avalanche breakdown.

Abstract: A bi-directional transient voltage suppression device with symmetric current-voltage characteristics is provided. The device comprises: (a) a lower semiconductor layer of first conductivity type; (b) an upper semiconductor layer of first conductivity type; and (b) a middle semiconductor layer adjacent to and disposed between the lower and upper layers, the middle layer having a second conductivity type opposite the first conductivity type, such that upper and lower p-n junctions are formed. In this device, the middle layer has a net doping concentration that is highest at a midpoint between the junctions. Furthermore, the doping profile along a line normal to the lower, middle and upper layers is such that, within the middle layer and within at least a portion of the lower and upper layers, the doping profile on one side of a centerplane of the middle layer mirrors the doping profile on an opposite side of the centerplane.

Abstract: A silicon substrate having a controlled oxygen content is sliced to form a wafer. The backside surface of the wafer is mechanically damaged for external gettering, polished, and subjected to heat for annealing to reduce strain and defects near the surface. The surface is then etched and the epitaxial layer formed by first growing an epitaxial layer, removing a substantial portion thereof, and then regrowing the layer to the required thickness. Immediately prior to device processing, an oxide layer is formed by heating the wafer, removing a portion of the epitaxial layer, and placing the wafer in an oxygen atmosphere. After a preselected time period in the oxygen atmosphere, the temperature is gradually reduced.