Patents by Inventor Danny L. C. Morlion

Danny L. C. Morlion has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8383951
    Abstract: Disclosed are methodologies for defining matched-impedance footprints on a substrate such as a printed circuit board, for example, that is adapted to receive an electrical component having an arrangement of terminal leads. Such a footprint may include an arrangement of electrically-conductive pads and an arrangement of electrically-conductive vias. The via arrangement may differ from the pad arrangement. The vias may be arranged to increase routing density, while limiting cross-talk and providing for matched impedance between the component and the substrate. The via arrangement may be altered to achieve a desired routing density on a layer of the board. Increasing the routing density may decrease the number of board layers, which tends to decrease capacitance and thereby increase impedance. Ground vias and signal vias may be arranged with respect to one another in such a manner as to affect impedance. Thus, the via arrangement may be altered to achieve an impedance that matches the impedance of the component.
    Type: Grant
    Filed: October 23, 2009
    Date of Patent: February 26, 2013
    Assignee: FCI
    Inventors: Danny L. C. Morlion, Stefaan Sercu, Winnie Heyvaert, Jan DeGeest
  • Patent number: 8183466
    Abstract: Disclosed are methodologies for defining matched-impedance footprints on a substrate such as a printed circuit board, for example, that is adapted to receive an electrical component having an arrangement of terminal leads. Such a footprint may include an arrangement of electrically-conductive pads and an arrangement of electrically-conductive vias. The via arrangement may differ from the pad arrangement. The vias may be arranged to increase routing density, while limiting cross-talk and providing for matched impedance between the component and the substrate. The via arrangement may be altered to achieve a desired routing density on a layer of the board. Increasing the routing density may decrease the number of board layers, which tends to decrease capacitance and thereby increase impedance. Ground vias and signal vias may be arranged with respect to one another in such a manner as to affect impedance. Thus, the via arrangement may be altered to achieve an impedance that matches the impedance of the component.
    Type: Grant
    Filed: October 23, 2009
    Date of Patent: May 22, 2012
    Assignee: FCI
    Inventors: Danny L. C. Morlion, Stefaan Sercu, Winnie Heyvaert, Jan DeGeest
  • Patent number: 7935896
    Abstract: Disclosed are methodologies for defining matched-impedance footprints on a substrate such as a printed circuit board, for example, that is adapted to receive an electrical component having an arrangement of terminal leads. Such a footprint may include an arrangement of electrically-conductive pads and an arrangement of electrically-conductive vias. The via arrangement may differ from the pad arrangement. The vias may be arranged to increase routing density, while limiting cross-talk and providing for matched impedance between the component and the substrate. The via arrangement may be altered to achieve a desired routing density on a layer of the board. Increasing the routing density may decrease the number of board layers, which tends to decrease capacitance and thereby increase impedance. Ground vias and signal vias may be arranged with respect to one another in such a manner as to affect impedance. Thus, the via arrangement may be altered to achieve an impedance that matches the impedance of the component.
    Type: Grant
    Filed: October 23, 2009
    Date of Patent: May 3, 2011
    Assignee: FCI
    Inventors: Danny L. C. Morlion, Stefaan Sercu, Winnie Heyvaert, Jan DeGeest
  • Patent number: 7837505
    Abstract: Connector systems include electrical connectors orthogonally connected to each other through shared through-holes in a midplane. An orthogonal vertical connector includes jogged contacts to offset for or equalize the different length contacts in the right-angle connector to which the vertical connector is connected. A first contact in the right angle connector may mate with a first contact in the vertical connector. A second contact in the right angle connector may mate with a second contact in the vertical connector. The first contact in the right angle connector may be greater in length than the adjacent second contact of the right angle connector. Thus, the second contact of the vertical connector may be jogged by the distance to increase the length of the second contact by the distance.
    Type: Grant
    Filed: January 16, 2009
    Date of Patent: November 23, 2010
    Assignee: FCI Americas Technology LLC
    Inventors: Steven E. Minich, Danny L. C. Morlion
  • Patent number: 7709747
    Abstract: Disclosed are methodologies for defining matched-impedance surface-mount technology footprints on a substrate such as a printed circuit board, for example, that is adapted to receive an electrical component having an arrangement of terminal leads. Such a footprint may include an arrangement of electrically-conductive pads and an arrangement of electrically-conductive vias. The via arrangement may differ from the pad arrangement. The vias may be arranged to increase routing density, while limiting cross-talk and providing for matched impedance between the component and the substrate. The via arrangement may be altered to achieve a desired routing density on a layer of the board. Increasing the routing density may decrease the number of board layers, which tends to decrease capacitance and thereby increase impedance. Ground vias and signal vias may be arranged with respect to one another in such a manner as to affect impedance.
    Type: Grant
    Filed: November 28, 2005
    Date of Patent: May 4, 2010
    Assignee: FCI
    Inventors: Danny L. C. Morlion, Stefaan Sercu, Winnie Heyvaert, Jan De Geest
  • Publication number: 20100048043
    Abstract: Disclosed are methodologies for defining matched-impedance footprints on a substrate such as a printed circuit board, for example, that is adapted to receive an electrical component having an arrangement of terminal leads. Such a footprint may include an arrangement of electrically-conductive pads and an arrangement of electrically-conductive vias. The via arrangement may differ from the pad arrangement. The vias may be arranged to increase routing density, while limiting cross-talk and providing for matched impedance between the component and the substrate. The via arrangement may be altered to achieve a desired routing density on a layer of the board. Increasing the routing density may decrease the number of board layers, which tends to decrease capacitance and thereby increase impedance. Ground vias and signal vias may be arranged with respect to one another in such a manner as to affect impedance. Thus, the via arrangement may be altered to achieve an impedance that matches the impedance of the component.
    Type: Application
    Filed: October 23, 2009
    Publication date: February 25, 2010
    Applicant: FCI AMERICAS TECHNOLOGY, INC.
    Inventors: Danny L.C. Morlion, Stefaan Sercu, Winnie Heyvaert, Jan DeGeest
  • Publication number: 20100041256
    Abstract: Disclosed are methodologies for defining matched-impedance footprints on a substrate such as a printed circuit board, for example, that is adapted to receive an electrical component having an arrangement of terminal leads. Such a footprint may include an arrangement of electrically-conductive pads and an arrangement of electrically-conductive vias. The via arrangement may differ from the pad arrangement. The vias may be arranged to increase routing density, while limiting cross-talk and providing for matched impedance between the component and the substrate. The via arrangement may be altered to achieve a desired routing density on a layer of the board. Increasing the routing density may decrease the number of board layers, which tends to decrease capacitance and thereby increase impedance. Ground vias and signal vias may be arranged with respect to one another in such a manner as to affect impedance. Thus, the via arrangement may be altered to achieve an impedance that matches the impedance of the component.
    Type: Application
    Filed: October 23, 2009
    Publication date: February 18, 2010
    Applicant: FCI Americas Technology, Inc.
    Inventors: Danny L.C. Morlion, Stefaan Sercu, Winnie Heyvaert, Jan DeGeest
  • Publication number: 20100041275
    Abstract: Disclosed are methodologies for defining matched-impedance footprints on a substrate such as a printed circuit board, for example, that is adapted to receive an electrical component having an arrangement of terminal leads. Such a footprint may include an arrangement of electrically-conductive pads and an arrangement of electrically-conductive vias. The via arrangement may differ from the pad arrangement. The vias may be arranged to increase routing density, while limiting cross-talk and providing for matched impedance between the component and the substrate. The via arrangement may be altered to achieve a desired routing density on a layer of the board. Increasing the routing density may decrease the number of board layers, which tends to decrease capacitance and thereby increase impedance. Ground vias and signal vias may be arranged with respect to one another in such a manner as to affect impedance. Thus, the via arrangement may be altered to achieve an impedance that matches the impedance of the component.
    Type: Application
    Filed: October 23, 2009
    Publication date: February 18, 2010
    Applicant: FCI Americas Technology, Inc.
    Inventors: Danny L.C. Morlion, Stefaan Sercu, Winnie Heyvaert, Jan DeGeest
  • Publication number: 20090149041
    Abstract: An orthogonal backplane connector systems having midplane footprints that provide for continuity of impedance and signal integrity through the midplane and allow for the same connector to be coupled to either side of the midplane. This design creates an orthogonal interconnect without taking up unnecessary PCB real estate. The midplane circuit board may include a first differential signal pair of electrically conductive vias disposed in a first direction, and a second differential signal pair of electrically conductive vias disposed in a second direction that is generally orthogonal to the first direction. The first and second differential signal pair of electrically conductive vias are electrically connected through the midplane circuit board. Each pair may be associated with and be located in between ground vias. A ground via that is large relative to the signal vias may be provided.
    Type: Application
    Filed: January 6, 2009
    Publication date: June 11, 2009
    Inventors: Danny L.C. Morlion, Steven E. Minich, Stephen B. Smith
  • Publication number: 20090124101
    Abstract: Connector systems include electrical connectors orthogonally connected to each other through shared through-holes in a midplane. An orthogonal vertical connector includes jogged contacts to offset for or equalize the different length contacts in the right-angle connector to which the vertical connector is connected. A first contact in the right angle connector may mate with a first contact in the vertical connector. A second contact in the right angle connector may mate with a second contact in the vertical connector. The first contact in the right angle connector may be greater in length than the adjacent second contact of the right angle connector. Thus, the second contact of the vertical connector may be jogged by the distance to increase the length of the second contact by the distance.
    Type: Application
    Filed: January 16, 2009
    Publication date: May 14, 2009
    Inventors: Steven E. Minich, Danny L.C. Morlion
  • Patent number: 7500871
    Abstract: Connector systems include electrical connectors orthogonally connected to each other through shared through-holes in a midplane. An orthogonal vertical connector includes jogged contacts to offset for or equalize the different length contacts in the right-angle connector to which the vertical connector is connected. A first contact in the right angle connector may mate with a first contact in the vertical connector. A second contact in the right angle connector may mate with a second contact in the vertical connector. The first contact in the right angle connector may be greater in length than the adjacent second contact of the right angle connector. Thus, the second contact of the vertical connector may be jogged by the distance to increase the length of the second contact by the distance.
    Type: Grant
    Filed: August 13, 2007
    Date of Patent: March 10, 2009
    Assignee: FCI Americas Technology, Inc.
    Inventors: Steven E. Minich, Danny L. C. Morlion
  • Publication number: 20080045079
    Abstract: Connector systems include electrical connectors orthogonally connected to each other through shared through-holes in a midplane. An orthogonal vertical connector includes jogged contacts to offset for or equalize the different length contacts in the right-angle connector to which the vertical connector is connected. A first contact in the right angle connector may mate with a first contact in the vertical connector. A second contact in the right angle connector may mate with a second contact in the vertical connector. The first contact in the right angle connector may be greater in length than the adjacent second contact of the right angle connector. Thus, the second contact of the vertical connector may be jogged by the distance to increase the length of the second contact by the distance.
    Type: Application
    Filed: August 13, 2007
    Publication date: February 21, 2008
    Inventors: Steven E. Minich, Danny L.C. Morlion
  • Patent number: 5961355
    Abstract: A novel high density receptacle is disclosed. The receptacle includes a housing portion, having a plurality of openings formed in its front face. A first column containing a first number of contact elements is positioned in relation to the housing so that the receiving portions of the contact elements are aligned with certain of the openings. A second column containing a second number of contact elements is positioned in relation to the housing so that the receiving portions of the contact elements are aligned with other of said openings. It is preferred for the receptacle to include a plurality of said first and second columns, wherein the columns are arranged side by side in an alternating pattern. The first column preferably includes a first wafer, wherein the contact elements are attached to said first wafer. A peg is formed on one of the side surfaces of the first wafer. The second column is preferably constructed similar to the first column, however, the second wafer to has a bore formed therein.
    Type: Grant
    Filed: December 17, 1997
    Date of Patent: October 5, 1999
    Assignee: Berg Technology, Inc.
    Inventors: Danny L. C. Morlion, Ab van Zanten
  • Patent number: 5277592
    Abstract: A contact assembly, in particular for a connector for electrical connection between printed circuit boards, comprising a support of resilient conductive material, an insulation layer disposed on the support and at least one signal conductor disposed on the insulation layer, wherein each signal conductor includes signal contact pads. The support functions as ground conductor. In the insulation layer adjacent the signal contact pad(s) an opening is provided to expose a part of the support as associated ground contact pad.The contact assemblies are manufactured by attaching a tape of conductive material to a tape of insulation material. A pattern of signal conductors is made from the tape of conductive material by means of a photolithographic process. Openings are formed in the tape of insulation material and said tape of insulation material with its side opposite to the signal conductors is attached on a support tape of resilient conductive material.
    Type: Grant
    Filed: July 14, 1992
    Date of Patent: January 11, 1994
    Assignee: Burndy Corporation
    Inventor: Danny L. C. Morlion
  • Patent number: 5197893
    Abstract: A connector assembly for printed circuit boards, comprises a first connector element with a first housing of insulating material and regularly arranged male signal and ground contacts connectable to a printed circuit board, and a second connector element with a second housing of insulating material, which can be inserted with an insertion side into the first housing, and with regularly arranged female signal and ground contacts with a connection element. These female contacts will contact the corresponding male contacts when the second housing is received in the first housing. The second connector element is provided with a plurality of outer conductors, each of said outer conductors mainly enclosing at least one signal contact in a circumferential direction and each of said outer conductors being adapted to contact the adjacent ground contacts of the/each corresponding signal contact of the first connector element.
    Type: Grant
    Filed: March 2, 1992
    Date of Patent: March 30, 1993
    Assignee: Burndy Corporation
    Inventors: Danny L. C. Morlion, Luc Jonckheere, Geert A. Lips
  • Patent number: 5163835
    Abstract: A contact assembly with at least one signal contact and at least one ground contact, in particular for use in a connector or the like, comprises a support of resilient conductive material, an insulating intermediate layer provided on the support and at least one signal conductor supported on the insulating intermediate layer. The support is used as ground conductor and two or more adjacent contacts pads are provided for each signal conductor or each group of signals conductors adjacent a first edge of the support. One contact pad is connected with the support and the other contact pad(s) is (are) connected to the respective signal conductors.
    Type: Grant
    Filed: June 12, 1991
    Date of Patent: November 17, 1992
    Assignee: Burndy Corporation
    Inventors: Danny L. C. Morlion, Udo H. Schoss
  • Patent number: 4897053
    Abstract: A contact pin for a printed circuit board comprises a compliant portion for mounting the contact pin in a hole in the printed circuit board. The compliant portion includes two legs extending in the longitudinal direction of the contact pin and joining a solid contact pin portion at both ends. These legs are twisted into a position in which seen in cross section these legs extend obliquely outwardly before insertion of the contact pin in a hole. The legs are separated from each other by a slot and each solid contact pin portion is provided with a positioning element projecting from the corresponding solid contact pin portion into said slot and being displaced outwardly with respect to the solid contact pin portions.
    Type: Grant
    Filed: April 11, 1989
    Date of Patent: January 30, 1990
    Assignee: Burndy Corporation
    Inventors: Robert J. Verhoeven, Danny L. C. Morlion
  • Patent number: 4775326
    Abstract: A contact pin for a printed circuit board comprises a mounting portion for mounting the contact pin in a hole in the printed circuit board. The mounting portion comprises three legs extending in the longitudinal direction of the contact pin, at least the outer legs joining a solid contact pin portion at both ends. As seen in cross section, the center leg is bent radially outwardly and lies with its inwardly directed part between the outer legs. Both outer legs are mainly twisted to a position in which these outer legs extend obliquely outwardly from the center leg, as seen in cross section. The center leg is displaced radially outwardly with respect to the longitudinal axis of the contact pin a constant distance substantially along its whole length. As seen in cross section, the center of the circle touching the outer side of the three legs, lies at a distance from the longitudinal axis of the contact pin in a direction radially opposite from the center leg.
    Type: Grant
    Filed: February 9, 1988
    Date of Patent: October 4, 1988
    Assignee: Burndy Electra N.V.
    Inventors: Jean P. E. A. Lenaerts, Danny L. C. Morlion